A Samsung 11nm Flip-Chip I/O library with dynamically switchable 1.8V/3.3V GPIO with fail-safe capability, 5V I2C / SMBus open-drain cell, 5V OTP cell, 1.8V 3.3V analog cells, and associated ESD.
A key attribute of this library is its ability to detect and dynamically adjust to a VDDIO supply of 1.8V or 3.3V during system operation. The GPIO cell can be configured as input, output, open source, or open drain with an optional internal 50K ohm pull up or pull down resistor. Four selectable drive strengths are offered (25 235MHz @ 1.8V, 10pF) to optimize across SS) currents & power. The output driver exhibits 50 ((20%) termination across PVT to reduce reflections at higher operating frequencies. Supply cells for VDDIO, VREF, and core VDD include necessary built in ESD circuitry. A 5VI2C / SMBUS open drain (fail safe) cell, 5V OTP, programming gate cell and 1.8V & 3.3V analog cells with ESD protection are included. The library features protection break cells to allow for separate grounds while maintaining ESD robustness. ESD design targets 2kV HBM, & 50 0V CDM, yet this library has constantly demonstrated 4kV HBM. This library can also support 2kV IEC 6100-4-2 system ESD with appropriate integration.
Operating Conditions
| Parameter | Value |
| VDDIO | 1.8/3.3V Selectable |
| VREF | 1.8V |
| Core VDD | 0.8V |
| Tj | -40C to 125C |
| MaxLoad | 50pF (10pF at speed) |
Cell Size and Metal Stack
| Cell Size | Metal Stack | Package Type |
| 65x80um | Various | Triple Staggered, WB, FC |
Library Cell Summary
| Cell Type | Feature |
| Supply/ESD | 1.8V/3.3V;0.8V; GND |
| GPIO | 25-235MHz, selectable |
| I2C Open-Drain | 5V, Fail-Safe |
| Analog | 1.8V & 3.3V |
| OTP | 5V Programming gate cell |
| Break Cells | VDDIO, VDD, VSS |
