Using AI to Accelerate Chip Design: Dynamic, Adaptive Flows
Chip designers are often stuck between a rock and a hard place. Not only are they dealing with staggering design complexity, but they're also under pressure to accelerate time to market. Anything that can help increase design and development efficiency, decision making, and speed provides much-needed relief.
In recent years, relief has come in the form of artificial intelligence (AI).
Synopsys is a pioneer in AI-driven electronic design automation (EDA), and we recently bolstered the AI capabilities of our Fusion Compiler via native integration with DSO.ai. With dynamic, adaptive flows powered by AI, the solution is able to automate decision making, optimize power, performance, and area (PPA), and deliver faster, more effective results.
Automating RTL-to-GDSII flows
Traditionally, large companies and design houses have centralized teams that create a single flow for all designs. Because these flows must cater to all design types, they’re often overly complex for simpler design partitions and under-tuned for the most demanding design partitions. In addition, design teams must commit to specific application settings and have limited ability to adjust those settings as they progress through the design implementation process.
The new, AI-driven adaptive flow capability of Fusion Compiler solves these problems. It enhances Register-Transfer Level (RTL) to Graphic Data System II (GDSII) processes by dynamically adapting the design flow and engine heuristics based on real-time observations. The AI continuously monitors and adapts the flow to ensure design convergence — even when initial configurations prove less effective.
Instead of a rigid, pre-defined flow sequence, the AI intelligently and dynamically adapts the engines and flows based on the unique characteristics and challenges of the current design. Not only between major flow steps, but also within the sub-flow steps not accessible by external agents.
By continuously monitoring design metrics and trends, the AI can autonomously:
- Choose an alternative optimization heuristic or methodology.
- Execute selective optimization steps to reduce turnaround time.
- Rearrange sub-flow steps to improve convergence.
- Reinforce a sub-flow step to increase the effort level for a given design challenge.
- Recover from sub-optimal results by re-executing a previous step with an alternative approach.
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