SoCs in New Context Look beyond PPA
If we look back in the last century, performance and area were two main criteria for semiconductor chip design. All design tools and flows were concentrated towards optimizing those two aspects. As a result, density of chips started increasing and power became a critical factor. Now, Power, Performance and Area (PPA) are looked together as the prime criteria for SoCs. Since the beginning of this century the semiconductor industry (including technology, design and software) worked tremendously to optimize PPA for semiconductor chips; the latest technologies being FinFET and FD-SOI.
Today, we have started seeing temperature as a key criterion for consideration in the semiconductor design. Like PPA, temperature acts as a basic criterion at the device and chip levels. We are seeing state-of-the-art tools in the market for thermal analysis of chips and packages. Temperature is a key criterion for hand-held mobile, automotive, and storage devices and therefore for SoCs in that space.
To read the full article, click here
Related Semiconductor IP
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
- MIPI SoundWire I3S Peripheral IP
- ML-DSA Digital Signature Engine
- P1619 / 802.1ae (MACSec) GCM/XTS/CBC-AES Core
Related Blogs
- Sonics CTO Drew Wingard - GHz and Beyond: Designing Today's Highest Performing SoCs
- Your New "Superpower": See Through "Hand-Off Walls" for Implementation PPA Insights on Early-Stage RTL
- New Neural Processor Aids in Adding AI to Small, Low-Power Vision Processing Designs
- Arm and Arteris Drive Innovation in Automotive SoCs
Latest Blogs
- Accelerating Your Development: Simplify SoC I/O with a Single Multi-Protocol SerDes IP
- Why What Where DIFI and the new version 1.3
- Accelerating PCIe Gen6 L0p Verification for AI & HPC Designs using Synopsys VIP
- ML-DSA explained: Quantum-Safe digital Signatures for secure embedded Systems
- Efficiency Defines The Future Of Data Movement