The Semiconductor World vs TSMC vs EDA
September 3, 2009
In my previous blog on the EDA CEO panel at #46DAC, I was very disappointed to hear some of the smartest men in our industry agree that the only way to increase semiconductor design enablement (EDA) revenues is to increase overall semiconductor revenues. Talk about a complete lack of respect for the innovative people who support them, when in fact executives like themselves, and even themselves, continue to minimize this industry through irresponsible pricing practices (Smorgasbored Pricing), thoughtless litigation (CDNS vs AVNT, MENT vs CDNS, SNPS vs LAVA), and egocentric behavior, which results in a colossal failure of common sense.
Related Semiconductor IP
- 1.8V/3.3V I/O library with ODIO and 5V HPD in TSMC 16nm
- 1.8V/3.3V I/O Library with ODIO and 5V HPD in TSMC 12nm
- 1.8V to 5V GPIO, 1.8V to 5V Analog in TSMC 180nm BCD
- 1.8V/3.3V GPIO Library with HDMI, Aanlog & LVDS Cells in TSMC 22nm
- Specialed 20V Analog I/O in TSMC 55nm
Related Blogs
- Should More Semiconductor, EDA Startups Look to Kickstarter?
- Special Report: Buying And Selling EDA Companies
- TSMC on Semiconductor IP Quality
- EDA: Not Like Semiconductor Equipment
Latest Blogs
- Cadence Unveils the Industry’s First eUSB2V2 IP Solutions
- Half of the Compute Shipped to Top Hyperscalers in 2025 will be Arm-based
- Industry's First Verification IP for Display Port Automotive Extensions (DP AE)
- IMG DXT GPU: A Game-Changer for Gaming Smartphones
- Rivos and Canonical partner to deliver scalable RISC-V solutions in Data Centers and enable an enterprise-grade Ubuntu experience across Rivos platforms