IP Accelerated (Bye Bye EDA 360)

By SemiWiki

June 12, 2014

Synopsys has been extremely active, during the last 10 years, not only launching new IP products every year, but also running an ambitious acquisition strategy, with no less than 8 acquisitions. Cascade acquisition bring PCI Express (controller only), when Accelerant bring SerDes (the earth of any PHY IP). The MIPS/Chipidea acquisition, made opportunistically during the 2009 depression, has allowed Synopsys to add Analog IP (ADC, DAC, Codec…) to the port-folio, as well as a large analog-skilled team. The 18X more expensive acquisition of Virage Logic has been a way to manage the foundation IP (Libraries, Memory compilers), as well as some interface IP (MIPI PHY). The large amount of this last deal ($315 million) explains why the next two acquisitions, the 10G PHY technology from MoSys and Inventure (Japanese IP vendor) have been less “impressive”, but useful to complete a geographical coverage (Inventure) and PHY IP extension to 10 Gbps. Finally, with Target acquisition at the beginning of 2014, Synopsys has completed the IP port-folio with a dataplane, application specific, core IP vendor (think about Tensilica).

What a large port-folio, isn’t it? But Synopsys IP customers expect more…

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