Intel says fabless model collapsing... really?
April 30, 2012
There is an interesting discussion in the SemiWiki forum in response to the EETimes article: Intel exec says fabless model 'collapsing'. Definitely an interesting debate, one worth our time since the advertising click hungry industry pundits will certainly jump all over it. Clearly I’m biased since I helped build the semiconductor ecosystem. I will certainly try and be open minded here, but probably not.
Kirk Skaugen, the new general manager of Intel’s client PC group, moderated a Q&A with Mark Bohr, a 33+ year Intel alum, and Brad Heaney, the Ivy Bridge program manager. This was clearly a scripted Intel PR piece, but also an opportunity for additional hyperbole and commentary.
To read the full article, click here
Related Semiconductor IP
- Network-on-Chip (NoC)
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
- DVB-S2 Demodulator
- UCIe PHY (Die-to-Die) IP
- UCIe-S 64GT/s PHY IP
Related Blogs
- More 'fabless IC billionaires' in 2010, says IC Insights! Is India listening?
- Intel Versus the Fabless Semiconductor Ecosystem!
- Intel Invests in the Fabless Semiconductor Ecosystem!
- Fab-Lite Model Scuppered
Latest Blogs
- Enabling End-to-End EDA Flow on Arm-Based Compute for Infrastructure Flexibility
- Real PPA improvements from analog IC migration
- Design specification: The cornerstone of an ASIC collaboration
- The importance of ADCs in low-power electrocardiography ASICs
- VESA Adaptive-Sync V2 Operation in DisplayPort VIP