Bringing MEMS and asynchronous logic into an SoC design flow
May 3, 2010
Two companies at the Embedded Systems Conference this week have similar objectives, but for very different technologies. Coventor, a vendor of CAD and analysis tools for creating MEMS devices, described a plan for bringing MEMS design into the standard CMOS SoC flow. And asynchronous logic design shop Tiempo showed a flow that facilitates development of large asynchronous blocks within a conventionally synchronous SoC.
To read the full article, click here
Related Semiconductor IP
- JESD204E Controller IP
- eUSB2V2.0 Controller + PHY IP
- I/O Library with LVDS in SkyWater 90nm
- 50G PON LDPC Encoder/Decoder
- UALink Controller
Related Blogs
- Inventors & IP Management: Bill Meade Interview
- Lead Times Up, Inventories Low, Double-Ordering Rife, Capacity Strained
Latest Blogs
- A Low-Leakage Digital Foundation for SkyWater 90nm SoCs: Introducing Certus’ Standard Cell Library
- FPGAs vs. eFPGAs: Understanding the Key Differences
- UCIe D2D Adapter Explained: Architecture, Flit Mapping, Reliability, and Protocol Multiplexing
- RT-Europa: The Foundation for RISC-V Automotive Real-Time Computing
- Arm Flexible Access broadens its scope to help more companies build silicon faster