Consolidation and EDA innovation
March 20, 2013
According to a poll conducted by EDAC, and presented at the EDAC Consortium’s CEO forecast, 74% of respondents think that consolidation within the EDA industry has been bad for innovation.
Having been in both startups and large EDA companies, I am somewhat surprised by this number and feel that I have to weigh in a little here, because I think the kinds of innovation that happen in both is essential for the health of our industry.
To read the full article, click here
Related Semiconductor IP
- Rad-Hard GPIO, ODIO & LVDS in SkyWater 90nm
- 1.22V/1uA Reference voltage and current source
- 1.2V SLVS Transceiver in UMC 110nm
- 1.8V/3.3V GPIO With I2C Compliant ODIO in GF 55nm
- Verification IP for UALink
Related Blogs
- EDA Industry: Consolidation Remains a Priority
- EDA Consolidation Continues
- Accelerating EDA innovation through SoC design methodology convergence
- EDAC CEOs: consolidation, clouds, and whether Intel will buy Synopsys