存储网络行业协会 (SNIA)方案改善数据在CXL 环境中的移动。
SDXI addresses limitations of proprietary Direct Memory Access devices.
By Gary Hilson, EETimes (January 5, 2023)
The Compute Express Link (CXL) spec is arguably one of the fastest-maturing interfaces in the semiconductor industry. Its widespread buy-in has meant many vendors have designed products to build out the ecosystem, with the Storage Networking Industry Association (SNIA) being the latest to put its hat in the ring to help further improve data movement.
On Nov. 28, SNIA introduced the Smart Data Accelerator Interface (SDXI) specification. Similar to CXL, the SDXI spec prioritizes efficient data movement; specifically, SDXI is a standard for a memory-to-memory data mover and acceleration interface. The genesis of the specification dates to September 2020, when a SNIA technical working group (TWG) set out to realize the concept of a Direct Memory Access (DMA) data-mover device and addressed common limitations.
The role of a DMA is to offload software-based copy loops to free up CPU execution cycles. Although the concept is well known, DMA adoption is often limited to specific privileged software and I/O use cases employing device-specific interfaces that aren’t forward-compatible. These limitations mean user-mode application usage is difficult in a non-virtualized environment and almost impossible in a multi-tenant virtualized environment.
Related Semiconductor IP
- JESD204D Transmitter and Receiver IP
- 100G UDP IP Stack
- Frequency Synthesizer
- Temperature Sensor IP
- LVDS Driver/Buffer
Related News
- 苹果与高通:谁解雇谁?
- 新思科技提供业界首款Compute Express Link(CXL)IP核解决方案,在数据密集型芯片中实现突破性性能
- Compute Express Link (CXL)联盟正式成立;宣布扩大董事会
- CXL财团与Gen-Z财团签署合作备忘录