IP Catalog > Security IP > Cryptography IP > Public Key Accelerator IP

Public Key Accelerator IP

Public key cryptography, or asymmetric cryptography, uses mathematical functions to create codes that are exceptionally difficult to crack, enabling designers to protect sensitive data and systems. Common public key algorithms include RSA, Digital Signature Algorithm (DSA), and Diffie-Hellman (DH), which require the calculation of complex modular exponentiation operations to encrypt, decrypt, sign, and verify data used in data encryption, digital signatures, and key exchanges. Similarly, the Elliptic Curve Cryptography (ECC) based algorithms require complex mathematical operations, such as point multiplications, and are designed to support devices with limited computing power or memory to encrypt internet traffic.

All offers in Public Key Accelerator IP
Filter
Filter

Login required.

Sign in

Login required.

Sign in

Login required.

Sign in

Search (80)
Compare 80 Public Key Accelerator IP from 18 vendors (1 - 10)
  • ML-DSA Digital Signature Engine
    • The KiviPQC™-DSA is a hardware accelerator for post-quantum cryptographic operations.
    • It implements the Module Lattice-based Digital Signature Algorithm (ML-DSA), standardized by NIST in FIPS 204.
    • This mechanism realizes the appropriate procedures for securely generating a private/public key pair, digitally signing a message or a data block, and performing digital signature verification. 
    Block Diagram -- ML-DSA Digital Signature Engine
  • ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
    • The KiviPQC™-Box is a hardware accelerator for post-quantum cryptographic operations.
    • It implements both the Module Lattice-based Key Encapsulation Mechanism (ML-KEM) and the Module Lattice-based Digital Signature Algorithm (ML-DSA), standardized by NIST in FIPS 203 and FIPS 204, respectively.
    Block Diagram -- ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
  • ML-KEM Key Encapsulation IP Core
    • The KiviPQC™-KEM is a hardware accelerator for post-quantum cryptographic operations.
    • It implements the Module Lattice-based Key Encapsulation Mechanism (ML-KEM), standardized by NIST in FIPS 203.
    • This mechanism realizes the appropriate procedures for securely exchanging a shared secret key between two parties that communicate over a public channel using a defined set of rules and parameters. 
    Block Diagram -- ML-KEM Key Encapsulation IP Core
  • Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
    • The Crypto Coprocessors are a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA or ASIC.
    • Symmetric operations are offloaded very efficiently as it has a built-in scatter/gather DMA. The coprocessors can be used to accelerate/offload IPsec, VPN, TLS/SSL, disk encryption, or any custom application requiring cryptography algorithms.
    Block Diagram -- Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
  • PKC Multi Hardware Accelerator IP
    • The PKC Multi hardware accelerator is a secure connection engine that can be used to offload the compute intensive Public Key operations (Diffie-Hellman Key Exchange, Signature Generation and Verification), widely used for High-performance TLS Handshake.
    Block Diagram -- PKC Multi Hardware Accelerator IP
  • Public Key Crypto Engine
    • The Public Key Crypto Engine is a versatile IP core for hardware offloading of all asymmetric cryptographic operations.
    • It enables any SoC, ASIC and FPGA to support efficient execution of RSA, ECC-based algorithms and more.
    • The IP core is ready for all ASIC and FPGA technologies.
    Block Diagram -- Public Key Crypto Engine
  • XMSS Post-Quantum Cryptography IP
    • XMSS is a Post-Quantum Cryptographic (PQC) algorithm, meaning it is mathematically designed to be robust against a cryptanalytic attack using a quantum computer.
    • XMSS is a stateful Hash-Based Signature Scheme that has been recommended by NIST in 2020.
    Block Diagram -- XMSS Post-Quantum Cryptography IP
  • ML-KEM / ML-DSA Post-Quantum Cryptography IP
    • ML-KEM (Crystals-Kyber) and ML-DSA (Crystals-Dilithium) are Post-Quantum Cryptographic (PQC) algorithms, meaning they are mathematically designed to be robust against a cryptanalytic attack using a quantum computer.
    • Both have been standardized by the NIST in it post-quantum cryptography project.
    Block Diagram -- ML-KEM / ML-DSA Post-Quantum Cryptography IP
  • Single instance HW Lattice PQC ultra accelerator
    • PQPerform-Flare is a powerful hardware-based FIPS 140-3 CAVP-certified product, designed for high throughput and low latency PQC.
    •  It adds PQC for applications that typically handle a large number of transactions, such as high-capacity network hardware applications and secure key management HSMs.
    Block Diagram -- Single instance HW Lattice PQC ultra accelerator
  • Highly configurable HW Lattice PQC ultra acceleration in AXI4 & PCIe systems
    • PQPerform-Inferno is a powerful, scalable hardware solution engineered for unparalleled performance in the post-quantum era.
    • As a FIPS 140-3 CAVP-certified product, it provides a trusted foundation for next-generation security.
    Block Diagram -- Highly configurable HW Lattice PQC ultra acceleration in AXI4 & PCIe systems
×
Semiconductor IP