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ML-KEM

ML-KEM (FIPS 203, formerly CRYSTALS-Kyber): This algorithm is based on lattice problems and offers a balance of security, efficiency, and ease of implementation, making it a suitable choice for general encryption tasks.

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Compare 26 ML-KEM from 12 vendors (1 - 10)
  • ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
    • The KiviPQC™-Box is a hardware accelerator for post-quantum cryptographic operations.
    • It implements both the Module Lattice-based Key Encapsulation Mechanism (ML-KEM) and the Module Lattice-based Digital Signature Algorithm (ML-DSA), standardized by NIST in FIPS 203 and FIPS 204, respectively.
    Block Diagram -- ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
  • ML-KEM Key Encapsulation IP Core
    • The KiviPQC™-KEM is a hardware accelerator for post-quantum cryptographic operations.
    • It implements the Module Lattice-based Key Encapsulation Mechanism (ML-KEM), standardized by NIST in FIPS 203.
    • This mechanism realizes the appropriate procedures for securely exchanging a shared secret key between two parties that communicate over a public channel using a defined set of rules and parameters. 
    Block Diagram -- ML-KEM Key Encapsulation IP Core
  • Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
    • The Crypto Coprocessors are a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA or ASIC.
    • Symmetric operations are offloaded very efficiently as it has a built-in scatter/gather DMA. The coprocessors can be used to accelerate/offload IPsec, VPN, TLS/SSL, disk encryption, or any custom application requiring cryptography algorithms.
    Block Diagram -- Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
  • ML-KEM / ML-DSA Post-Quantum Cryptography IP
    • ML-KEM (Crystals-Kyber) and ML-DSA (Crystals-Dilithium) are Post-Quantum Cryptographic (PQC) algorithms, meaning they are mathematically designed to be robust against a cryptanalytic attack using a quantum computer.
    • Both have been standardized by the NIST in it post-quantum cryptography project.
    Block Diagram -- ML-KEM / ML-DSA Post-Quantum Cryptography IP
  • Single instance HW Lattice PQC ultra accelerator
    • PQPerform-Flare is a powerful hardware-based FIPS 140-3 CAVP-certified product, designed for high throughput and low latency PQC.
    •  It adds PQC for applications that typically handle a large number of transactions, such as high-capacity network hardware applications and secure key management HSMs.
    Block Diagram -- Single instance HW Lattice PQC ultra accelerator
  • Highly configurable HW Lattice PQC ultra acceleration in AXI4 & PCIe systems
    • PQPerform-Inferno is a powerful, scalable hardware solution engineered for unparalleled performance in the post-quantum era.
    • As a FIPS 140-3 CAVP-certified product, it provides a trusted foundation for next-generation security.
    Block Diagram -- Highly configurable HW Lattice PQC ultra acceleration in AXI4 & PCIe systems
  • PQPerform-Inferno + RISC-V processor for enhanced crypto-agility
    • PQPerform-Flex provides robust and agile high-performance acceleration for the ML-KEM and ML-DSA post-quantum cryptographic algorithms but also future standards (programmable post-silicon, such as HQC), designed for seamless integration into modern SoC designs for both ASIC and FPGA targets.
    Block Diagram -- PQPerform-Inferno + RISC-V processor for enhanced crypto-agility
  • PQC CRYSTALS core for accelerating NIST FIPS 202 FIPS 203 and FIPS 204
    • eSi-Crystals is a hardware core for accelerating the high-level operations specified in the NIST FIPS 202, FIPS 203 and FIPS 204 standards.
    • It supports the Cryptographic Suite for Algebraic Lattices (CRYSTALS), it is lattice-based digital signature algorithm designed to withstand attacks from quantum computers, placing it in the category of post-quantum cryptography (PQC). 
    Block Diagram -- PQC CRYSTALS core for accelerating NIST FIPS 202 FIPS 203 and FIPS 204
  • APB Post-Quantum Cryptography Accelerator IP Core
    • Implements ML-KEM and ML-DSA post-quantum cryptography digital signature standards. The system interface is an microprocessor slave bus (APB, AHB, AXI options are available).
    • The design is fully synchronous and requires only minimal CPU intervention due to internal microprogramming sequencer.
    Block Diagram -- APB Post-Quantum Cryptography Accelerator IP Core
  • KYBER IP Core
    • supports encapsulation and decapsulation operations
    • supports all modes K=2,3,4.
    • is compliant with Kyber specification round 3.
    • has fully stallable input and output interfaces. 
    • Key generation feature is going to be implemented in the near future.
    Block Diagram -- KYBER IP Core
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