IP Catalog > VDC-M

VDC-M IP

Filter
Filter

Login required.

Sign in

Search (16)
Compare 16 IP from 6 vendors (1 - 10)
  • VESA VDC-M Encoder IP
    • VESA VDC-M 1.2 Compliance
    • Advanced Encoding Mechanisms
    • Configurable High Resolution Support
    • Adjustable Bit Rate
    Block Diagram -- VESA VDC-M Encoder IP
  • VDC-M Encoder IIP
    • Supports VDC-M specification version 1.1 and 1.2.
    • Supports full VDC-M encoder functionality.
    • Supports following maximum bitrates (BPPmax), as follows:
    • 3 × bits_per_component,for 4:4:4
    Block Diagram -- VDC-M Encoder IIP
  • VDC-M Decoder IIP
    • Supports VDC-M specification version 1.1 and 1.2.
    • Supports full VDC-M decoder functionality.
    • Supports following maximum bitrates (BPPmax), as follows:
    • 3 × bits_per_component,for 4:4:4
    Block Diagram -- VDC-M Decoder IIP
  • VDC-M 1.2 Encoder
    • VESA Display Compression-M (VDC-M) 1.2 Compliant
    • 8, 10, or 12 bits per Color Support
    • 4:4:4 RGB Native Encoding
    • 4:4:4, 4:2:2, or 4:2:0 YCbCr Native Encoding
    Block Diagram -- VDC-M 1.2 Encoder
  • VDC-M 1.2 Decoder
    • VESA Display Compression-M (VDC-M) 1.2 Compliant
    • Ultra-low Latency
    • Reduces Power and System Costs
    • Slice Configuration : 1, 2, 3, 4
    • Optimized for Power Saving
    Block Diagram -- VDC-M 1.2 Decoder
  • VESA VDC-M Decoder
    • VESA Display Compression-M (VDC-M) 1.2 compliant
    • Supports all VDC-M encoding mechanisms: BP, transform, MPP, MPP fallback, BP skip, flatness detection and signaling
    • Configurable maximum display resolution of up to 16Kx16K
    • Configurable compressed bit rate, in increments of 1/16 bpp
    • 8, 10, or 12 bits per component video
    • 4:4:4 sampling for RGB video input format
    Block Diagram -- VESA VDC-M Decoder
  • VESA VDC-M Encoder
    • VESA Display Compression-M (VDC-M) 1.2 compliant
    • Supports all VDC-M encoding mechanisms: BP, transform, MPP, MPP fallback, BP skip, flatness detection and signaling
    • Configurable maximum display resolution of up to 16Kx16K
    • Configurable compressed bit rate, in increments of 1/16 bpp
    • 8, 10, or 12 bits per component video
    Block Diagram -- VESA VDC-M Encoder
  • VESA VDCM 1.2 Encoder
    • Compliant with the VESA DSC 1.2a and 1.1 specifications
    • Supports all DSC video formats: RGB, YCbCr, native 4:2:2/4:2:0, simple 4:2:2
    • Supports the latest interface standards: HDMI 2.1, MIPI DSI, DisplayPort
    • Configurable IP delivers low-power and small area
    Block Diagram -- VESA VDCM 1.2 Encoder
  • VESA VDCM 1.1 Encoder
    • Compliant with the VESA DSC 1.2a and 1.1 specifications
    • Supports all DSC video formats: RGB, YCbCr, native 4:2:2/4:2:0, simple 4:2:2
    • Supports the latest interface standards: HDMI 2.1, MIPI DSI, DisplayPort
    • Configurable IP delivers low-power and small area
    Block Diagram -- VESA VDCM 1.1 Encoder
  • VESA DSC V1.2 Encoder
    • VESA introduced the first Display Stream Compression (DSC) standard in 2014. The DSC 1.1 has been incorporated into the VESA Embedded DisplayPort (eDP) and MIPI® DSI embedded mobile interface standards. The latest VESA Display Compression-M (VDC-M) standard has also been adopted into the MIPI DSI standard. For mobile applications, DSC 1.1 and VDC-M mainly serve to reduce the video interface data rate, which reduces system power, prolongs battery life, and reduces interconnects to enable sleeker designs. For external display interfaces, DSC 1.2b extends resolution across existing connectors and cables, enabling 8K video and legacy support from the same connection.
    • Being compliant with the VESA DSC 1.2a and 1.2b standards, the IP core supports various prediction schemes (MMAP, BP, MPP, ICH) as well as color formats in YCbCr and RGB. It transfers more pixel data over display links to save memory size in embedded frame buffers in display driver ICs and performs visually lossless compression, low gate count and latency for ultra-high-definition display applications. It can be easily integrated into ASIC and FPGA applications.
    • Programmable display resolutions
    •  
    Block Diagram -- VESA DSC V1.2 Encoder
×
Semiconductor IP