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TSMC 5nm IP

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Search (113)
Compare 113 IP from 7 vendors (1 - 10)
  • TSMC 5nm UCIe-A 32G LP Die to Die Interface
    • TSMC 5nm UCIe-A 32G LP Die to Die Interface
  • PHY for PCIe 6.0 and CXL for TSMC 5nm FinFet
    • DSP-based Long Reach (LR) equalization and clock data recovery (CDR) provide superior performance and reliability
    • Low active and standby power consumption, supports L1 sub-states standby power management
    • Extensive set of isolation, test modes, and loopbacks including APB and JTAG
    • Supports lane aggregation and bifurcation
  • 112G-ELR PAM4 SerDes PHY - TSMC 5nm
    • TSMC 5nm FinFET CMOS Process
    • Power-optimized for ELR and LR links
    • Integrated BIST capable of producing and checking PRBS
    • 56-112Gbps PAM4 or 1-56Gbps NRZ data rates
  • 1.2V/1.8V TSMC 5nm I3C with 7A CDM MS Add-on
    • Synopsys I3C IO library supports a simplified system of connecting and managing multiple sensors in a device
    • Multiple sensor secondary devices can be controlled by one I3C primary device at a time
    • It offers backward compatibility with I2C legacy devices, is designed for high IO voltage domains and supports low-core voltage domains
    • The I3C incorporates the Schmitt-Trigger function, supports I2C Legacy Fast Mode and FM+ Mode, and includes HBM and CDM ESD protection
  • 1.2V/1.8V TSMC 5nm I3C with 7A CDM
    • Synopsys I3C IO library supports a simplified system of connecting and managing multiple sensors in a device
    • Multiple sensor secondary devices can be controlled by one I3C primary device at a time
    • It offers backward compatibility with I2C legacy devices, is designed for high IO voltage domains and supports low-core voltage domains
    • The I3C incorporates the Schmitt-Trigger function, supports I2C Legacy Fast Mode and FM+ Mode, and includes HBM and CDM ESD protection
  • TSMC 5nm LVDS RX IO 1.5V
    • Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for data transmission
    • A few typical LVDS IO applications are in display monitors, printers, high-speed clock transfers, and high-speed SERDES
    • Synopsys LVDS IO library is used to build an LVDS-based interface for high-speed interconnect applications
    • This library is designed to optimize IO performance with a core voltage of 0.75 V and supports an IO supply voltage of 1.2V/1.5 V
  • TSMC 5nm LVDS IO 1.5V MS add-on
    • Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for data transmission
    • A few typical LVDS IO applications are in display monitors, printers, high-speed clock transfers, and high-speed SERDES
    • Synopsys LVDS IO library is used to build an LVDS-based interface for high-speed interconnect applications
    • This library is designed to optimize IO performance with a core voltage of 0.75 V and supports an IO supply voltage of 1.2V/1.5 V
  • TSMC 5nm LVDS IO 1.5V
    • Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for data transmission
    • A few typical LVDS IO applications are in display monitors, printers, high-speed clock transfers, and high-speed SERDES
    • Synopsys LVDS IO library is used to build an LVDS-based interface for high-speed interconnect applications
    • This library is designed to optimize IO performance with a core voltage of 0.75 V and supports an IO supply voltage of 1.2V/1.5 V
  • TSMC 5nm LVDS IO 1.2V MS Add-on
    • Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for data transmission
    • A few typical LVDS IO applications are in display monitors, printers, high-speed clock transfers, and high-speed SERDES
    • Synopsys LVDS IO library is used to build an LVDS-based interface for high-speed interconnect applications
    • This library is designed to optimize IO performance with a core voltage of 0.75 V and supports an IO supply voltage of 1.2V/1.5 V
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