Real-time Pixel Processor IP
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Real-time Pixel Processor for Vision applications
- The W Series provides configurable input and output data widths.
- It supports input image frames with 8 to 16-bit amplitude resolutions, while it can output tone-mapped frames with 12 bits per pixel.
- The W Series are ISPs which are optimized for area while getting the best image quality.
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Real-time Pixel Processor for Vision applications
- The H Series provides configurable input and output data widths. It accepts YCbCr or RAW input data and supports input image frames with 8, 10 and 12-bit amplitude resolutions.
- The H1 Series are ISPs which are optimized for area while getting the best image quality.
- Options to extend the pipeline with a Machine Vision output or configuring the line size to further optimize area are possible.
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Image Signal Processor IP enabling high performance real-time image processing
- Support DVP Input Interface
- Support 8-16 Bit Bayer RAW and ITU-R BT.601 & 656 Video Interface
- Test Pattern Generator (TPG)
- Black Level Measurement and Compensation (BLS)
- Sensor Linear Correction
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Image Signal Processor IP - High performance image signal processing for auto and industrial markets
- 32bit DVP interface, 24bit ISP pipeline
- Dual pixel per cycle throughput
- Wide Dynamic Range Tone Mapping (WDR)
- Multi-exposure HDR (Native/build in HDR, Compand output, DOL/Stagger, Stagger output)
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Graphics Processor Overlay IP Core
- Technology independent soft IP Core for FPGA, ASIC and SoC devices
- Supplied as human-readable VHDL (or Verilog) source code
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Image Signal Processor (5MP, 2X Sensors) IP
- Self-contained, no external memory needed
- ARM® Cortex-R4 CPU @500 MHz
- Up to 2 Mbytes of SRAM
- Up to 4 Mbytes of stacked Flash or 16 Mbyte external Flash with update via communication interfaces
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Image Signal Processing for Automotive and Industrial Applications
- Multi-Camera Support
- Advanced Noise Reduction
- Every Pixel Reliable