Image Signal Processor (5MP, 2X Sensors) IP
Overview
This is a versatile system-on-chip device designed for automotive, security and a multitude of other camera applications. From video and audio input through HDR image signal processing, lens distortion correction, graphics overlay, video compression, video analytics acceleration, CPU, operating and non-volatile memory, media access controller, to video and audio outputs and communication interfaces, it comprises all elements to support compact, low bill-of-material and low energy-consumption camera applications. No external memory chips such as DRAM or Flash are required for its operation, predictive H.264 video encoding inclusive. Resulting ready-for-display video can be output as-is over the parallel or serial video output port, or real-time compressed for streaming out through one of: RGMII/GMII, SDIO or SPI interfaces. An audio signal can be input through either an I2S or a PDM input, processed by the CPU and inserted into the output data stream. A return audio channel is also supported, outputting the audio on an I2S output. Precise Time Protocol (PTP) support and other provisions on the die allow precise instant-of-exposure synchronization of cameras in a multi-camera system, independent of cable lengths. A cryptographic and hash unit permits protection of customer intellectual property embedded in their software. Flash content can be updated via communication interfaces, thus allowing non-intrusive customer firmware updates. A debug access port (DAP) helps users in their software
Key Features
- Self-contained, no external memory needed
- ARM® Cortex-R4 CPU @500 MHz
- Up to 2 Mbytes of SRAM
- Up to 4 Mbytes of stacked Flash or 16 Mbyte external Flash with update via communication interfaces
- Emulated EEPROM in Flash content
- Interrupt and DMA controllers
- 150 Mpixel/s effective throughput, 5 Mpixel spatial resolution and 22-bit front-end processing
- global tone mapping and gamma
- lens anti-shading, noise suppression, defective pixel repair, sharpening, adaptive color matrix, multiple scaling engines
- Image statistics engine for 3 A support
- Video compression
- JPEG 8-bit/12-bit, 5/2.1 Mpixel @30 fps
- 264 baseline I,P, 2.1 Mpixel @30 fps
- Video analytics accelerators
- edge data extractor
- optical flow generator
- Lens mapping (for example fish-eye) correction
- Graphics overlay
- Code protection against hacking
- Multi-camera synchronization support
- Operation with quartz crystal or external clock
- Interfaces
- serial (CSI-2) and parallel video in and out
- RGMII/GMII, 2x SDIO, 2x SPI, 3x I2C, CAN, 6x LIN, multiple GPIOs with 4x ADC inputs
- I2S in, I2S out, PDM for digital microphone
- clock output for image sensor
- ASIL-related features
- Low power consumption
- -40 °C to +105 °C operating temperature range (Ta)
- AEC-Q100 grade 2 compliance
Block Diagram
Deliverables
- Source Code
- Test Benches
- Documentation
- Lib files
Technical Specifications
Maturity
In Production
Availability
Immediate
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