RISC-V CPU IP

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Compare 57 IP from 20 vendors (1 - 10)

RISC-V Processor - RV12 - 32/64 bit, Single Core CPU
- High Performance 32/64bit CPU
- Highly Parameterized
- Size and power optimized design
- Industry standard software support
RISC-V CPU IP With ISO 26262 Full Compliance
- AndeStar™ V5 Instruction Set Architecture (ISA), compliant to RISC-V technology
- Floating point extensions
- Bit-manipulation extensions
Ultra Compact 32-bit RISC-V CPU Core
- AndeStar™ V5/V5e Instruction Set Architecture (ISA)
- Compliant to RISC-V technology
- Support RV32IMAC/EMAC
32-bit RISC-V CPU with M, Zicsr extensions, and External Debug support
- Five-stage pipeline
- Harvard architecture
- RV32I Base RISC-V ISA
64-bit RISC-V CPU with M, Zicsr extensions and External Debug support
- Five-stage pipeline
- Harvard architecture
- RV64I Base RISC-V ISA
Low Power RISCV CPU
- RISC-V RV32 instruction set:
- Machine mode only
- 32 vectorized interrupts
- Standard debug as defined per RISC-V
Highly scalable inference NPU IP for next-gen AI applications
- Matrix Multiplication: 4096 MACs/cycles (int 8), 1024 MACs/cycles (int 16)
- Vector processor: RISC-V with RVV 1.0
- Custom instructions for softmax and local storage access
High performance dual-issue, out-of-order, 7-stage pipeline superscalar core
- Design Flexibility
- Portability
- Ease of programmability
64-bit CPU with RISC-V Vector Extension
- AndeStar™ V5 Instruction Set Architecture (ISA), compliant to RISC-V technology
- RISC-V vector extension
64-bit CPU with RISC-V Vector Extension
- AndeStar™ V5 Instruction Set Architecture (ISA), compliant to RISC-V technology
- RISC-V vector extension