Low Power RISCV CPU IP

Key Features

  • RISC-V RV32 instruction set:
    • I > full support
    • M > partial support
    • C > full support
  • Machine mode only
  • 32 vectorized interrupts
  • Standard debug as defined per RISC-V

Technical Specifications

Short description
Low Power RISCV CPU IP
Vendor
Vendor Name
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Semiconductor IP