IP Catalog > Post-Quantum Cryptographic

Post-Quantum Cryptographic IP

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Compare 18 IP from 11 vendors (1 - 10)
  • IoT device security platform with a hybrid post-quantum cryptographic algorithm
    • Software development lifecycle integration (SDLC, CI/CD)
    • Key and certificate management (PKI/CLM)
    • On-device security features (e.g. secure boot, flash encryption)
    • On-device key generation & storage
    Block Diagram -- IoT device security platform with a hybrid post-quantum cryptographic algorithm
  • Cryptographic Cores IP
    • The Cryptographic Cores IP portfolio delivers secure, high-performance implementations of symmetric, asymmetric, and post-quantum algorithms.
    • Designed for low-area, low-latency operation, the silicon-proven cores help SoC designers and embedded teams build trusted, efficient devices for IoT, automotive, medical, and industrial markets.
  • Post-Quantum Key Encapsulation IP Core
    • The PQC-KEM is an IP Core for ML-KEM Key Encapsulation that supports key generation, encapsulation, and decapsulation operations for all ML-KEM variants standardized by NIST in FIPS 203.
    • ML-KEM is a post-quantum cryptographic (PQC) algorithm, designed to be robust against a quantum computer attack.
    Block Diagram -- Post-Quantum Key Encapsulation IP Core
  • Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
    • The Crypto Coprocessors are a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA or ASIC.
    • Symmetric operations are offloaded very efficiently as it has a built-in scatter/gather DMA. The coprocessors can be used to accelerate/offload IPsec, VPN, TLS/SSL, disk encryption, or any custom application requiring cryptography algorithms.
    Block Diagram -- Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
  • High-speed, high-throughput, lattice PQC cryptographic subsystem
    • A powerful hardware-based product that is designed for high throughput and high speed.
    • PQPerform-Lattice adds post-quantum cryptography for applications that handle a large number of transactions, such as high-capacity network hardware applications or HSMs (hardware security modules) requiring fast performance.
    • It’s designed for performance and supports FIPS 204 ML-DSA digital signatures for quantum-secure authentication and FIPS 203 ML-KEM for quantum-secure key exchange.
    Block Diagram -- High-speed, high-throughput, lattice PQC cryptographic subsystem
  • Self-contained cryptographic subsystem designed for PQC + classical, minimal integration effort, with SCA protection
    • A cryptographic subsystem, designed to provide cryptographic services.
    • These services include post-quantum signature generation, verification, and secure key establishment.
    • PQPlatform-SubSys uses its built-in CPU independently from the surrounding system, allowing cryptographic services to be offloaded efficiently from the system processor.
    Block Diagram -- Self-contained cryptographic subsystem designed for PQC + classical, minimal integration effort, with SCA protection
  • Lattice-based Post-Quantum Cryptography Processing Engine
    • PQC(post-quantumcryptography) engine
    • NISTSP800-56Acomplaint
    • NISTFIPS186-4and186-5compliant
    • ANSSIX9.142-2020compliant
    Block Diagram -- Lattice-based Post-Quantum Cryptography Processing Engine
  • Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
    • Turn-key implementations of the NIST FIPS recommended CRYSTALS post-quantum for key encapsulation (KEM) and digital signature algorithm (DSA)
    Block Diagram -- Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
  • Post-Quantum Cryptography IP: Crystals Kyber - Crystals Dilithium - XMSS - LMS
    • 512 and/or 768 and/or 1024-bit secret key length
    • Implementation protected against Side-Channel Attacks (Key Generation and Key Decapsulation operations are sensitive):
    • Hybrid hardware-software tunable solution
    • Tunable in performance or power/area
  • ML-KEM Key Encapsulation IP Core
    • The KiviPQC™-KEM IP core is a hardware accelerator for post-quantum cryptographic operations.
    • It implements the Module Lattice-based Key Encapsulation Mechanism (ML-KEM), standardized by NIST in FIPS 203.
    • This mechanism realizes the appropriate procedures for securely exchanging a shared secret key between two parties that communicate over a public channel using a defined set of rules and parameters.
    Block Diagram -- ML-KEM Key Encapsulation IP Core
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