NOR flash memory IP

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Compare 29 IP from 17 vendors (1 - 10)
  • Twin Quad NOR Flash Memory Model
    • Supports Twin Quad NOR Flash memory devices like MT25T_QLKT_L_01G_xBB from all leading vendors
    • Supports 100% of Twin Quad NOR Flash protocol standards.
    • Supports all the Twin Quad NOR Flash commands as per the specs.
    • Supports Stacked device (two 512Mb die)
    Block Diagram -- Twin Quad NOR Flash Memory Model
  • Serial NOR Flash Memory Model
    • Supports Serial NOR Flash memory devices like MT25QL128ABA, MT25QL512ABA, MX25L12835F, MX25L25635F, N25Q032A from all leading vendors like Macronix, Micron, Winbond and many more.
    • Supports 100% of Serial NOR Flash protocol.
    • Supports all the Serial NOR Flash commands as per the specs.
    • Supports Single and Double Transfer Rate (STR/DTR).
    Block Diagram -- Serial NOR Flash Memory Model
  • Parallel NOR Flash Memory Model
    • Supports Parallel NOR Flash memory devices from all leading vendors.
    • Supports 100% of Parallel NOR Flash protocol standard.
    • Supports all the Parallel NOR Flash commands as per the specs.
    • Supports Asynchronous random/page read
    Block Diagram -- Parallel NOR Flash Memory Model
  • Serial NOR Flash Synthesizable Transactor
    • Supports 100% of Serial NOR Flash protocol standard
    • Supports all the Serial NOR Flash commands as per the specs
    • Supports single and double transfer rate (STR/DTR)
    • Supports following protocols in both STR and DTR:
    Block Diagram -- Serial NOR Flash Synthesizable Transactor
  • Parallel NOR Flash Synthesizable Transactor
    • Supports 100% of Parallel NOR Flash protocol standard
    • Supports all the Parallel NOR Flash commands as per the specs
    • supports asynchronous random/page read:
    • Page size : 16 words or 32 bytes
    Block Diagram -- Parallel NOR Flash Synthesizable Transactor
  • External NOR flash protection solution that supports real-time decryption and execution in place
    • Designed to provide the execution-in-place (XiP) capability of encrypted instructions in flash memory.
    Block Diagram -- External NOR flash protection solution that supports real-time decryption and execution in place
  • External Flash Memory Interface IP
    • AXI4-Lite standard user interface. Connects as a 32-bit slave on AXI interface
    • Page-wise programming according to the flash memory requirements handled by the IP
    • Memory single bit error detection and correction implemented in the IP-core.
    • User configurable, industry standard NOR flash memories can be interfaced with the IP on SPI and Quad-SPI interfaces.
    Block Diagram -- External Flash Memory Interface IP
  • Embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability
    • SuperFlash technology
    • CMOS compatible
    • Up to 500K cycle endurance
    Block Diagram -- Embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability
  • Hyperbus Flash Memory Controller
    • Compatible with spansion hyperbus based memory products.
    • 0 Wait State Write Burst Operation for HyperBus memory on AXI interface of up to 256 words.
    Block Diagram -- Hyperbus Flash Memory Controller
  • Quad SPI Flash Memory Controller
    • Device Independent
    • Efficient Bandwidth Utilization
    Block Diagram -- Quad SPI Flash Memory Controller
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Semiconductor IP