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MIPI RFFE IP

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  • MIPI RFFE Master Controller IP Core v3.0
    • Fully compliant to MIPI RFFE standard
    • Small footprint
    • Code validated with Spyglass
    Block Diagram -- MIPI RFFE Master Controller IP Core v3.0
  • MIPI RFFE Slave IP Core
    • Richly Featured
    • Solid
    • Easy to use
    • Silicon Agnostic
    Block Diagram -- MIPI RFFE Slave IP Core
  • MIPI RFFE Master IP Core
    • Fully compliant with MIPI RFFE v3.0 Specification
    • Supports all RFFE Slave commands
    • Support Standard, Timed and Mappable Triggers
    Block Diagram -- MIPI RFFE Master IP Core
  • MIPI RFFE Slave Controller IP Core v3.0
    • Compliant with MIPI’s RFFE specification Rev3.0
    • Small silicon footprint
    • Scalable Implementation
    Block Diagram -- MIPI RFFE Slave Controller IP Core v3.0
  • MIPI RFFE Master IP
    • Compliant with version 3.0 MIPI RFFE Specifications.
    • Full MIPI RFFE Master Functionality.
    • Supports following frames
    • Supports extended register read/writes
  • MIPI RFFE Slave Controller IP Core
    • Compliant with MIPI RFFE Specification 1.10
    • Configurable implementation with respect to number and type of registers
    • Up to 15 Devices can be connected per RFFE bus
    • Low pin count on RFFE interface (SCLK and SDATA)
  • MIPI RFFE Master Controller IP Core
    • Compliant with MIPI RFFE Specification 1.10
    • Up to 15 Slaves can be connected per RFFE bus
    • Low pin count on RFFE interface (SCLK and SDATA)
    • Low EMI
  • MIPI RFFE SPI Slave IP
    • Compliant with 3.0 MIPI RFFE Specification and SPI Block Guide V04.01 Specification
    • Full MIPI RFFE Slave functionality.
    • Supports following frames
    • -> Command Frame
  • MIPI RFFE SPI I2C Slave IP
    • Supports 2.0 MIPI RFFE Specification
    • Supports SPI Block Guide V04.01 Specification
    • Full MIPI RFFE Slave functionality
    • Supports following frames
  • MIPI RFFE Slave IP
    • Compliant with version 3.0 MIPI RFFE Specifications.
    • Full MIPI RFFE Slave functionality.
    • Supports following frames
    • Supports extended register read/writes
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