MIPI D-PHY TSMC 22nm IP
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7
IP
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7)
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2.5G MIPI D-PHY in TSMC 22nm
- ? Complaint MIPI D-PHY v1.2.
- ? Support up to 2.5Gb/s HS data transmission.
- ? Support one clock and up to 4 data lanes.
- ? Support ULPS.
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MIPI D-PHY Tx-Only 4 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6)
- Compliant with the MIPI D-PHY specification
- Fully verified hard macro
- Up to 2.5 Gb/s per lane
- Aggregate throughput up to 10 Gb/s in 4 data lanes
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MIPI D-PHY Tx-Only 2 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6)
- Compliant with the MIPI D-PHY specification
- Fully verified hard macro
- Up to 2.5 Gb/s per lane
- Aggregate throughput up to 10 Gb/s in 4 data lanes
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MIPI D-PHY Rx-Only 4 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6)
- Compliant with the MIPI D-PHY specification
- Fully verified hard macro
- Up to 2.5 Gb/s per lane
- Aggregate throughput up to 10 Gb/s in 4 data lanes
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MIPI D-PHY Rx-Only 2 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6)
- Compliant with the MIPI D-PHY specification
- Fully verified hard macro
- Up to 2.5 Gb/s per lane
- Aggregate throughput up to 10 Gb/s in 4 data lanes
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MIPI D-PHY℠ v2.5 IP Core
- This Tx/Rx transceiver complies with the MIPI Alliance C-PHY℠ v2.0 and D-PHY℠ v2.5 specifications, with world-class area and power dissipation, and is available for a range of foundry processes.
- This IP delivers 6 Gbps per lane for a max throughput of 24 Gbps in D-PHY℠ mode, and 6 Gsps per trio for a max throughput of 41.04 Gbps in C-PHY℠ mode.
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MIPI C-PHY℠ v2.0 + D-PHY℠ v2.5 Combo IP Core
- This Tx/Rx transceiver complies with the MIPI Alliance C-PHY℠ v2.0 and D-PHY℠ v2.5 specifications, with world-class area and power dissipation, and is available for a range of foundry processes.
- This IP delivers 6 Gbps per lane for a max throughput of 24 Gbps in D-PHY℠ mode, and 6 Gsps per trio for a max throughput of 41.04 Gbps in C-PHY℠ mode.
