LVDS IP
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453
IP
from 60 vendors
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10)
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LVDS TX IP, 1Gbps for Per-Lane - SMIC 28nm
- LVDS TX IP, 1Gbps for Per-Lane
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40Mbps LVDS IO - SMIC 40nm
- 40Mbps LVDS IO
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LVDS Deserializer IP
- The MXL-DS-LVDS is a high performance 4-channel LVDS Deserializer implemented using digital CMOS technology.
- Both the serial and parallel data are organized into four channels. The parallel data can be 7 or 10 bits wide per channel. The input clock is 25MHz to 165MHz. The De-serializer is highly integrated and requires no external components.
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LVDS Serializer IP
- The MXL-SR-LVDS is a high performance 4-channel LVDS Serializer implemented using digital CMOS technology. Both the serial and parallel data are organized into four channels.
- The parallel data width is programmable, and the input clock is 25MHz to 165MHz. The Serializer is highly integrated and requires no external components.
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LVDS Tunneling Protocol and Interface (LTPI) IP
- LVDS Tunneling Protocol and Interface (LTPI) is a soft IP introduced in the DC-SCM 2.0 Specification to facilitate the tunneling of low-speed signals between the host platform module (HPM) and secure control module (SCM) through the low-voltage differential signaling (LVDS) interfaces.
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1.8V/3.3V GPIO Library with HDMI, Aanlog & LVDS Cells in TSMC 22nm
- A TSMC 22nm Inline, Flip Chip compatible library with GPIO, ODIO, HDMI, LVDS, & Analog Cells.
- This silicon-proven, flip chip compatible library in TSMC 22nm boasts a two speed GPIO: 75MHz and 150MHz.
- The library also features a 5V ODIO. GPIO and ODIO cells have an orientation of NS and EW.
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LVDS Transceiver in TSMC 28nm
- This 1.8V LVDS transceiver, designed for TSMCs 28nm process, delivers high-speed, low-power differential signaling with superior signal integrity.
- Engineered with 1.8V thick oxide devices and a 0.8V standard core interface, it operates ef- ficiently across a wide temperature range (-40°C to 125°C).
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GF12 - 0.8V LVDS Rad-Hard Transceiver in GF 12nm
- The 2.5Gbps LVDS transceiver in GlobalFoundries LP/LP+ is designed for high-speed, low-power data transmission in radiation-intensive environments.
- Engineered with a Rad-Hard by Design approach, the Rad-Hard cells have been proton tested to 64 MeV with a flux exceeding 1.3E+09, and is latch-up proven to 200mA across -40C to 125C, ensuring robust immunity against TID, SEE, and SEL effects.
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High-speed LVDS (Low-Voltage Differential Signaling) transceiver
- Compatible with ANSI/TIA/EIA 644-1995 LVDS standard
- Multi-channel LVDS transceiver function
- Maximum data transfer rate: 992Mbps (496MHz)
- Typical output voltage: 350mV (100-Ω load)
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LVDS Transceiver
- Meets or exceeds the TIA/EIA-644 LVDS standard.
- Driver, Receiver, Bias, and Power cells included.
- Greater than 400Mbs data rate.
- 1.8V core voltage, 3.3V IO voltage.
- Receive fault detection.
