Ethernet MAC IP

Filter
Filter

Login required.

Sign in

Login required.

Sign in

Login required.

Sign in

Compare 625 IP from 72 vendors (1 - 10)
  • Gigabit Ethernet MAC IP Core
    • The silicon-proven Gigabit Ethernet IP core provides a 10/100 Mbps Media Independent Interface (MII) and a 1000 Mbps Gigabit Media Independent Interface (GMII).
    • It also supports optional Reduced MII (RGMII), and Serial GMII (SGMII).
    Block Diagram -- Gigabit Ethernet MAC IP Core
  • 10/100 Ethernet MAC IP core
    • The 10/100 Ethernet Media Access Controller (MAC) IP core is compliant with the Ethernet IEEE 802.3-2002 standard and has passed interoperability testing at UNH-IOL.
    • The 10/100 Ethernet IP core provides an 10/100 Mbps Media Independent Interface (MII) and an optional processor interface; it also supports Reduced MII (RMII) and Serial MII (SMII).
    Block Diagram -- 10/100 Ethernet MAC IP core
  • 10 Gigabit Ethernet MAC IP Core
    • The 10 Gigabit Ethernet (XGMAC) IP core is compliant with the Ethernet IEEE 802.3-2008 standard and provides an interface between AHB/AXI Bus and the 10 Gigabit Media Independent Interface (XGMII) using a powerful 64-bit Scatter Gather DMA.
    • The 10 Gigabit Ethernet IP core is designed for applications such as integrated networking devices, host bus adapters, PCI-Express Ethernet controllers, and Ethernet adapter cards.
    Block Diagram -- 10 Gigabit Ethernet MAC IP Core
  • 40G Ethernet MAC and PHY FPGA IP Core
    • The 40G Ethernet MAC and PHY FPGA IP core offers IEEE 802.3ba-2010
    • 40 Gbps Ethernet is an industry standard and is compliant for media access control (MAC) and PHY (PCS+PMA) functions
    • It enables an FPGA to interface to another device over a copper or optical transceiver module
    • The IP supports IEEE 1588 v2 standard with two-step timestamping as well as backplane capability on a variety of Stratix® or Arria® FPGAs.
    Block Diagram -- 40G Ethernet MAC and PHY FPGA IP Core
  • 100 G Ethernet MAC & PCS IP Core
    • The 100 Gbps Ethernet IP solution offers a fully integrated IEEE802.3ba compliant package for NIC (Network Interface Card) and Ethernet switching applications.
    •  Ethernet IP solution implements two user (application) side interfaces. The register configuration and control port is a 32-bit AXI4-Lite    interface.
    Block Diagram -- 100 G Ethernet MAC & PCS IP Core
  • 10 Gigabit Ethernet MAC ASIL B Compliant Controller for Automotive Applications
    • Compliant with the IEEE 802.3az-2010 specification
    • Supports 1/2.5/5/10G data rates
    • Supports VLAN tag processing Checksum insertion and AVB
    • Supports IEEE 1588 PTP
    Block Diagram -- 10 Gigabit Ethernet MAC ASIL B Compliant Controller for Automotive Applications
  • 10 Gigabit Ethernet MAC
    • Compliant with the IEEE 802.3az-2010 specification
    • Supports 1/2.5/5/10G data rates
    • Supports VLAN tag processing Checksum insertion and AVB
    • Supports IEEE 1588 PTP
    Block Diagram -- 10 Gigabit Ethernet MAC
  • Ethernet MAC 10/100/1G Quality-of-Service
    • Compliant with IEEE specifications
    • Compliant with Arm AMBA specifications
    • RGMII/RTBI specification version 2.6 from HP/Marvell
    • RMII specification version 1.2 from RMII consortium
    Block Diagram -- Ethernet MAC 10/100/1G Quality-of-Service
  • Automotive 10/100/1G Ethernet MAC
    • Compliant with IEEE specifications
    • Compliant with Arm AMBA specifications
    • RGMII/RTBI specification version 2.6 from HP/Marvell
    • RMII specification version 1.2 from RMII consortium
    Block Diagram -- Automotive 10/100/1G Ethernet MAC
  • Enterprise Ethernet MAC Controller IP
    • Compliant with IEEE standards
    • Arm AMBA 3.0 and AMBA 3 APB subordinate ports
    • AMBA 4 AXI and ACE protocol specifications, February 2013, Arm for 4 AXI and 4 APB interfaces
    • Interfaces to the PHY layer through a configurable interface supporting XLGMII/CGMII, XGMII or GMII interface
    Block Diagram -- Enterprise Ethernet MAC Controller IP
×
Semiconductor IP