DPU IP
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DPU for Convolutional Neural Network
- Configurable hardware architecture
- Configurable core number up to three
- Convolution and deconvolution
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Neoverse Compute Subsystems N3 (CSS N3)
- Fastest Path to Market for Neoverse N3
- Configurable for Cloud to Edge
- Highly Customizable
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Data Movement Engine - Efficient data-processing and simultaneous multi-threading, low latency and deterministic data access
- Efficient throughput with the first RISC-V core to support up to 4-way multithreading
- Highly scalable multi-core, multi-cluster coherent computing solution
- MIPS Enhancements for increased connectivity and throughput
- Use in 5G/6G Comms Infrastructure, Automotive Gateways, Embedded & Datacenter
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Secure RoT Core for Data Centers
- Efficient Performance
- SCA/FIA Protections
- Flexible Interfaces
- Security Certification Readiness