Alphawave Semi IP

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Compare 40 IP from 1 vendors (1 - 10)
  • Long-Reach (LR) Multi-Standard-Serdes (MSS) IP
    • The AthenaCORE Long-Reach (LR) Multi-Standard-Serdes (MSS) IP is the highest performance SerDes in the vendor product portfolio.
    • It is a highly configurable IP that supports the most leading edge NRZ, PAM and Coherent data center standards and applications from 10Gbps to 224Gbps for Ethernet, PCIe and CXL.
  • HBM3 PHY
    • Offers superior power efficiency and supports up to 4 active operating states and dynamic voltage scaling. With a fully optimized hard macro design on advanced process technology,
    • Delivers highly reliable industry-leading performance.
    • Implements an optimized micro bump array and is delivered as hard macro GOS ready for integration into 2.5D system applications.
    Block Diagram -- HBM3 PHY
  • HBM3 Controller
    • The HermesCORE High-Bandwidth Memory Generation 3 (HBM3) controller is ideal for applications involving graphics, high-performance computing, high-end networking, and communications that require very high memory bandwidth, lower latency, and more density.
    • The controller can be delivered as part of a complete HBM3 memory subsystem with an integrated HBM3 PHY.
    Block Diagram -- HBM3 Controller
  • CXL Controller
    • Implements CXL 3.0 Specification at 64 GT/s
    • Parallel Multiple TLP/DLLP processing engine for best performance, throughput, and latency
    • Designed for easy integration with PipeCORE™ PCIe® PHY IP
    Block Diagram -- CXL Controller
  • PCIe Controller
    • Implements PCIe 6.0 Specification at 64 GT/s
    • Parallel Multiple TLP/DLLP processing engine for best performance, throughput, and latency
    • Designed for easy integration with Alphawave PipeCORE™ PCIe PHY IP
    • Key IP features configurable to optimize IP for exact application requirements
    Block Diagram -- PCIe Controller
  • UCIe Die-to-Die PHY
    • High Bandwidth Density and Data Rates
    • Package Configurability
    • Energy Efficiency
    • Fully Integrated Solution
    Block Diagram -- UCIe Die-to-Die PHY
  • Xtra-Long-Reach (XLR) Multi-Standard-Serdes (MSS) IP
    • Most Likely Sequence Detector(MLSD)
    • High speed A/D
    • Sub-sampling clock multiplier
    • Master Controller
    Block Diagram -- Xtra-Long-Reach (XLR) Multi-Standard-Serdes (MSS) IP
  • Multi-channel, multi-rate Ethernet aggregator - 10G to 1.6T ZX (e.g., Telecom)
    • OmegaCORE 1p6T ZX from Alphawave Semi is a multi-channel, multi-rate Ethernet aggregator that supports tributaries from 10GE to 800GE, utilizing 112G/s SerDes and 56G/s SerDes. OmegaCORE 1p6T ZX consists of multi-channel and multi-rate PCS and MAC Cores.
    Block Diagram -- Multi-channel, multi-rate Ethernet aggregator - 10G to 1.6T ZX (e.g., Telecom)
  • 100G OTN Digital Wrapper
    • The OTU4 Digital Wrapper IP Core offers 100G/s client transport rate over Optical Transport Network (OTN), specified by ITU-T G.709 recommendation.

    Block Diagram -- 100G OTN Digital Wrapper
  • 40G OTN Digital Wrapper
    • The 40G OTN Digital Wrapper IP Core offers 40G/s client transport rate over Optical Transport Network (OTN), specified by ITU-T G.709 recommendation.
    Block Diagram -- 40G OTN Digital Wrapper
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Semiconductor IP