ASIL-D safety IP

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Compare 4 IP from 3 vendors (1 - 4)

High Performance Scalable Sensor Hub DSP Architecture
- Self contained, specialized sensor hub on-device processor
- Unifies multi-sensor processing with AI and sensor fusion
- Highy-configurable 8-way VLIW architecture
32-bit Embedded RISC-V Functional Safety Processor
- Designed for Functional Safety
- Efficient Embedded RISC-V Processor
- Powerful Debug Features
IP for Automotive Applications
- M31 M-PHY certified by ISO 26262 ASIL-B is a serial interface technology which is widely adopted in automotive devices interface transmission. As a MIPI Alliance contributor and an Interface IP provider, M31 provides a silicon-proven, low-power and low cost M-PHY IP in different process nodes.
- M31 D-PHY certified by ISO 26262 ASIL-B Ready is a very popular physical layer interface for mobile applications as it is a flexible, high-speed, low-power and low-cost solution. M31 also provides silicon-proven D-PHY in various process nodes. Many car and mobile devices manufacturers are adopting MIPI specifications because the solutions are mature, relatively simple to use.
- M31 PCIe PHY certified by ISO 26262 ASIL-B Ready provides high-performance, multi-lane capability and low power architecture for the high-bandwidth applications. It is optimized the minimal die area and low power consumption. The safe mechanism of PCIe PHY is compliant with PCI Express Base 4.0, PCI Express Base 3.1, PCI Express Base 2.1 and PCI Express Base It can meet the complete range of PCIe high bandwidth application in different channel conditions.
- M31 High Speed Memory Compilers including “One-Port”, “Two-Port”, “Single-Port”, and “Dual-Port” have all passed ISO 26262 ASIL-B Ready and ASIL-D Ready certification. High speed SRAM instances are the fundamental blocks for all automotive applications. Users can generate different memory types, sizes and configurations according to different requirements. In addition, the compilers provide customers comprehensive product applications with vehicle safety requirements. Furthermore, the whole series products are ASIL D Ready certified and provide optimized IP portfolio solutions for different customer’ designs with more flexible choices of design architecture.
LIN Bus Master/Slave Controller Core
- Support of LIN specifications 2.0, 2.1, and 2.2A
- Configurable for support of master or slave functionality
- Programmable data rate between 1 Kbit/s and 20 Kbit/s (for master)
- Automatic bit-rate detection (for slave)