28FDSOI SERDES IP
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4
IP
from 2 vendors
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4)
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Networking SerDes IP, Silicon Proven in ST 28FDSOI
- Networking Application SERDES
- From 1.25Gb/s to 15.5Gb/s
- From 1.25Gb/s to 28Gb/s
- Technology: 28FDSOI, 10ML
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XPHY Low power Chip to Chip SerDes IP, Silicon Proven in ST 28FDSOI
- Low Power Chip-to-Chip SERDES
- From 10Gb/s to 11Gb/s
- Technology: 28FDSOI 8ML & 10ML
- Platform: 1 Data Slice and 1 Clock Slices
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MIPHY Consumer SerDes IP, Silicon Proven in ST 28FDSOI
- Consumer Application SERDES
- From 1.125Gb/s to 8Gb/s/ 10Gbs
- Technology: 28FDSOI 8ML & 10ML
- Support multi lane configuration
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PCI Express Gen3 / SATA3 SERDES PHY on Samsung 28FDSOI
- Programmable SERDES analog front end that supports 1 to 8 Gbps standard serial protocols
- Compact form factor – 0.165 mm2 active silicon area per lane including ESD
- Industry leading low power – typically 6.5 mW/Gbps including termination
- Finely configurable receiver impedance, CTLE gain and bandwidth, with fully adaptive CTLE and DFE