LPDDR2 Controller IP

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Compare 9 LPDDR2 Controller IP from 3 vendors (1 - 9)

Universal Multi-port Memory Controller for RLDRAM2/3, DDR4/3, DDR4 3DS and LPDDR3/2 and LPDDR3/2
- The UMMC Controller is a highly flexible and configurable design. It is targeted for high bandwidth access and low power consumption such as next generation mobile, DDR/LPDDR networking and consumer applications.
- The controller architecture is carefully tailored to achieve reliable high-frequency operation with dynamic power management and rapid system debug capabilities.
LPDDR2 IP solution
- Compatible with LPDDR2 up to 1066Mbps
- AXI compliant multi-ports, and data width, FIFO depth, command queue depth configurable
- DFI compliant interface between controller and PHY
- Support ECC (error correcting code)
LPDDR2 Synthesizable Transactor
- Supports 100% of LPDDR2 protocol standard JESD209-2E and JESD209-2F
- Supports all the LPDDR2 commands as per the specs
- Supports up to 32GB device density
- Supports following devices:
LPDDR2 DFI Verification IP
- Compliant with DFI version 2.1 or higher Specifications.
- Supports LPDDR2 devices compliant with JEDEC LPDDR2 SDRAM Standard JESD209-2F.pdf and JESD209-2E.pdf
- Supports for Read data-eye training
- Supports for Read gate training
LPDDR2 Controller IIP
- Supports LPDDR2 protocol standard JESD209-2E and JESD209-2F Specification
- Compliant with DFI version 2.1 or higher Specification.
- Supports up to 16 AXI ports with data width upto 512 bits.
- Supports controllable outstanding transactions for AXI write and read channels
LPDDR Controller IIP
- Supports LPDDR protocol standard and JESD209A-1 and JESD209B Specification
- Compliant with DFI version 2.0 or higher Specification.
- Supports up to 16 AXI ports with data width upto 512 bits.
- Supports controllable outstanding transcations for AXI write and read channels
LPDDR2 Assertion IP
- Specification Compliance
- Supports LPDDR2 memory devices from all leading vendors.
- Supports 100% of LPDDR2 protocol standard JESD209-2E and JESD209-2F.
- Supports all the LPDDR2 commands as per the specs.
LPDDR2 DFI Assertion IP
- Specification Compliance
- Compliant with DFI version 2.1 or higher Specifications.
- Supports LPDDR2 devices compliant with JEDEC LPDDR2 SDRAM Standard JESD209-2F.pdf and JESD209-2E.pdf.
- Supports for Read data-eye training.
LPDDR DFI Assertion IP
- Specification Compliance
- Compliant with DFI version 2.0 or higher Specifications.
- Supports LPDDR devices compliant with JEDEC LPDDR SDRAM Standard JESD209A-1.pdf and JESD209B.pdf.
- Supports all Interface Groups.