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SONET/SDH IP

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Search (17)
Compare 17 SONET/SDH IP from 8 vendors (1 - 10)
  • SONET/SDH: OC48/STM-16 Framer
    • Source Direction
    • Support software programmable TOH bytes per bit with bit mask
    • Support external TOH insertion on all TOH bytes per bit with bit mask
    • Support software programmable on all POH bytes with bit mask
    Block Diagram -- SONET/SDH: OC48/STM-16 Framer
  • SONET/SDH: OC192/STM-64 Framer
    • Features
    • Source Direction
    • Support software programmable TOH bytes per bit with bit mask
    • Support external TOH insertion on all TOH bytes per bit with bit mask
    Block Diagram -- SONET/SDH: OC192/STM-64 Framer
  • SONET/SDH: OC12/4xOC3|STM-4/4xSTM-1 Framer
    • Source Direction
    • Support software programmable TOH bytes per bit with bit mask
    • Support external TOH insertion on all TOH bytes per bit with bit mask
    • Support software programmable on all POH bytes with bit mask
    Block Diagram -- SONET/SDH: OC12/4xOC3|STM-4/4xSTM-1 Framer
  • Quad GbE Over SONET/SDH
    • Encapsulates GbE frames into SONET/SDH protocol using packet-over SONET (POS) and simplified data link (SDL)
    • Quad OC-12c POS interface to the SONET/SDH network, each OC-12c carries one GbE data channel
    • Performs all SONET/SDH section, line, and path termination functions
    • Support for Jumbo Ethernet packets, up to 9.6 Kbytes
    Block Diagram -- Quad GbE Over SONET/SDH
  • Universal G704-E1 Framer / Deframer Core
    • Asymmetric Application (e.g. E1 - ATM, nx64 - E1, E1 - 30 BRI-Channels)
    • Symmetric Application (e.g. E1-E1)
    • Multi G704 on Chip (e.g E1-E2)
    • Basic and Multiframe Alignment
    Block Diagram -- Universal G704-E1 Framer / Deframer Core
  • SONET/SDH OC-3 / OC-12 Transceiver/CDR PHY
    • Fully integrated transceiver architectures that include: Clock synthesis, Clock Recovery, Wave shaping, low-jitter LVPECL interface, S/P/S functions.
    • High frequency PLLs with integrated on chip loop filters.
    • Supports 155.52 Mb/s (OC-3), 622.08 Mb/s (OC-12) with Selectable reference frequencies of 77.76 or 155.52 MHz.
    • LVPECL or LVDS circuitry for external interfacing to optical units.
  • EA/MZ Modulator Driver 1.25Gb/s to 11.3Gb/s
    • Data-rates from 1.25Gb/s to 11.3Gb/s.
    • Single –5.2V Power Supply
    • Programmable output voltage from
    • Programmable EAM bias voltage up to 1V
  • 2.5G PDH/SONET/SDH Packet Mapper
    • The TPW48-P packet mapper supports both Ethernet over SONET/SDH mapping and Ethernet over Packet-PDH mapping.
    • Up to 128 VCAT groups based on higher or lower order SONET/SDH/PDH containers.
    • Support of LCAS for hitless increase/decrease of capacity.
  • Fractional N PLL 8.5-11.3GHz in GF N65
    • Clock monitor output
    • Stand-by mode
    • 1.2V Power Supply
    • Adjustable (+/-30%) reference current
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