ESD Protection IP for TSMC
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- 16nm
-
High-voltage solutions in baseline GlobalFoundries and multi-foundry technologies
- High-Voltage ESD
- Physical Features
-
1.8V GPIO: 3.3V Tolerant
- • High performance, programmable general purpose I/O cell
- 3.3V tolerant only @ VDVDD = 1.8V
- Fault tolerant @ PAD = 3.3V
- • Staggered CUP wire bond implementation with flip chip option