CAM IP for TSMC
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27
CAM IP
for TSMC
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eTCAM (Embedded Ternary Content Addressable Memory IP
- One cycle operation latency (without priority encoder)
- Valid Bit per entry to reduce power
- Valid Bit reset in one cycle support
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eTCAM (Embedded Ternary Content Addressable Memory IP
- One cycle operation latency (without priority encoder)
- Valid Bit per entry to reduce power
- Valid Bit reset in one cycle support
- Mask input option for bit-write and masked search key
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TSMC CLN7FF Pre-search and Pipeline Ternary Content Addressable Memory Compiler
- Ternary Content Addressable Memory (TCAM) operates within a voltage range from 0.675V to 0.825V and a junction temperature range from -40°C to 125°C. The available supported macro size is configured from 64bits to 80K bits.
- ? Pins and metal layers
- – 1P5M (1X_h_1Xa_v_1Ya_h_1Y_v): 5 metal layers used and top metal is MY
- – Power mesh supported with M5 pins
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TSMC CLN5FFP Pre-search and Pipeline Ternary Content Addressable Memory
- IGMTLSY02A, TSMC CLN5FFP Pre-search and Pipeline Ternary Content Addressable Memory
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TSMC CLN5FF Ternary Content Addressable Memory Compiler with Column Redundancy
- Ternary Content Addressable Memory (TCAM) operates within voltage range from 0.675V to 0.825V and junction temperature range from -40°C to 125°C. The available supported macro size is configurable from 32bits to 80K bits.
- Pins and metal layers
- 1P4M (1X_h_1Xb_v_1Xe_h): 4 metal layers used and top metal is MXe
- Power mesh supported with M4 pins
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TSMC CLN12FFC Ternary Content Addressable Memory Compiler
- Ternary Content Addressable Memory (TCAM) operates within voltage range from 0.72V to 0.88V and junction temperature range from -40°C to 125°C. The available supported macro size is configurable from 128bits to 80K bits.
- Pins and metal layers
- General features
- BIST compiler features
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TSMC CLN16FFC Ternary Content Addressable Memory
- Ternary Content Addressable Memory (TCAM) operates within a voltage range from 0.72 V to 0.88 V and a junction temperature range from -40 oC to 125 oC. The available supported macro size is configured from 128 bits to 80K bits.
- Pins and metal layers
- 5 metal layers used and top metal is Mxe_v
- Power mesh with M5 pins support
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TSMC CLN16FFC TCAM Compiler with ULVT periphery
- TSMC CLN16FFC TCAM Compiler with ULVT periphery