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USB IP for TSMC

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Compare 7 USB IP for TSMC from 2 vendors (1 - 7)
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  • 3nm
  • USB 2.0 femtoPHY - TSMC N3P 1.2V x1, North/South (vertical) poly orientation
    • Ported to over 50 different processes and configurations ranging from 65-nm to 14/16-nm FinFET
    • Supports the USB 2.0 protocol and data rate (480 Mbps)
    • Supports the USB Type-C specification
    • USB femtoPHY, USB nanoPHY and USB picoPHY offer a tunability feature that allows quick, post-silicon adjustments that occur due to process variations, or unexpected chip and board parasitic, without modifying the existing design
    Block Diagram -- USB 2.0 femtoPHY - TSMC N3P 1.2V x1, North/South (vertical) poly orientation
  • eUSB 2.0 PHY - TSMC N3P x1, North/South (vertical) poly orientation
    • Designed for 7nm processes and below
    • Supports the USB 2.0 protocol and High Speed, Full Speed, and Low Speed data rates
    • eUSB2 PHYs supports USB 2.0, 3.0, 3.1 and 3.2 Device, Host and Dual Role configurations
    Block Diagram -- eUSB 2.0 PHY - TSMC N3P x1, North/South (vertical) poly orientation
  • eUSB 2.0 PHY - TSMC N3E x1, North/South (vertical) poly orientation
    • Designed for 7nm processes and below
    • Supports the USB 2.0 protocol and High Speed, Full Speed, and Low Speed data rates
    • eUSB2 PHYs supports USB 2.0, 3.0, 3.1 and 3.2 Device, Host and Dual Role configurations
    Block Diagram -- eUSB 2.0 PHY - TSMC N3E x1, North/South (vertical) poly orientation
  • eUSB2 v1.1 Dual-Role, repeater/native mode PHY, TSMC N3E, 1.2V, N/S orientation
    • Fully compliant with Embedded Universal Serial Bus 2.0 (eUSB) electrical specification
    • Compliant with UTMI+ specifications (High-speed, Full-speed, and Low-speed functions)
    • Support clock inputs from 10/12/25/30/19.2/24/32/38.4MHz clock source
    • Support repeater and native modes
    Block Diagram -- eUSB2 v1.1 Dual-Role, repeater/native mode PHY, TSMC N3E, 1.2V, N/S orientation
  • eUSB2 v1.2 Dual-Role, repeater/native mode PHY, TSMC N3P, 1.2V, N/S orientation
    • Fully compliant with Embedded Universal Serial Bus 2.0 (eUSB) electrical specification
    • Compliant with UTMI+ specifications (High-speed, Full-speed, and Low-speed functions)
    • Support clock inputs from 10/12/25/30/19.2/24/32/38.4MHz clock source
    • Support repeater and native modes
    Block Diagram -- eUSB2 v1.2 Dual-Role, repeater/native mode PHY, TSMC N3P, 1.2V, N/S orientation
  • USB 2.0 femtoPHY in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, 10nm, N7, N6, N5, N3P)
    • Complete mixed-signal physical layer for single-chip USB 2.0 Host, Device, and Dual Role applications Small PHY macro area: as small as 0.20 mm2
    • Low power: as low as 50mW (during high-speed packet transmission)
    • Advanced power management features including support for power supply gating, supply scaling, ultra-low standby current support, and power management unit (PMU) interrupt support
    • Supports USB 2.0 ID-pin detection and OTG Voltage Detectors
  • eUSB 2.0 PHY in TSMC (N5, N4P, N3E, N3P)
    • Compliant with eUSB2 specification rev 1.1
    • Can be used in USB Host, Device, and Dual Role applications
    • eUSB2 PHY and eUSB2 repeater supports USB 2.0 480Mbps (High Speed), 12Mbps (Full Speed) and 1.5Mbps (Low Speed) data rates
    • eUSB2 PHY designed for the most advanced process nodes that does not support 3.3V signaling and 5V tolerance
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