MIPI M-PHY IP for TSMC

Compare 6 MIPI M-PHY IP for TSMC from 2 vendors (1 - 6)

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MIPI M-PHY Type 1 G5 2TX2RX - TSMC N7 1.8V, North/South Poly Orientation
- Compliant with MIPI M-PHY v5.0 specification
- Supports MIPI UniPro, JEDEC UFS protocols
- Supports High-Speed (HS) Gear1,
- Gear2, Gear3, Gear4 and Gear5 A/B modes
- Supports M-PHY Type-I
MIPI M-PHY G4 Type 1 2TX2RX - TSMC 7FF 1.8V, North/South Poly Orientation
- Compliant with MIPI M-PHY v5.0 specification
- Supports MIPI UniPro, JEDEC UFS protocols
- Supports High-Speed (HS) Gear1,
- Gear2, Gear3, Gear4 and Gear5 A/B modes
- Supports M-PHY Type-I
MIPI M-PHY G4 Type 1 2TX2RX - TSMC 7FF 1.8V, N/S, for Automotive, ASIL B Random, AEC-Q100 Grade 2
- Compliant with MIPI M-PHY v5.0 specification
- Supports MIPI UniPro, JEDEC UFS protocols
- Supports High-Speed (HS) Gear1,
- Gear2, Gear3, Gear4 and Gear5 A/B modes
- Supports M-PHY Type-I
MIPI MPHY v4.1, 2Tx-2Rx Type-1, TSMC N7, 1.8V, N/S orientation(ASIL-B)
- Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2)
- High speed gears, HS-G1A/B, HS-G2A/B, HS-G3A/B and HS-G4A/B with scalable power consumptions
- Low speed PWM Gears from G1 to G4 with ultra-low power consumptions
- Supports reference-less function during low-speed operation
MIPI M-PHY G4 Type 1 2Tx2RX in TSMC (16nm, 12nm, N7, N6, N5, N4, N3E)
- Compliant with either the MIPI M-PHY v5.0 or MIPI M-PHY v4.1 specification as M-PHY Type-I
- Supports MIPI UniPro, JEDEC UFS protocols
- Supports High-Speed (HS) Gear1, Gear2, Gear3, Gear4 and Gear5 4 A/B modes
- Low-speed Pulse-Width Modulation (PWM) Gear1 to Gear5 in Type-I LS implementation
MIPI M-PHY v3.1 IP in TSMC(12/16nm, 28nm, 40nm, and 55nm)
- Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2) and DigRF
- High speed gears, HS-G1A/B, HS-G2A/B and HS-G3A/B with scalable power consumptions
- Burst mode CDR with short sync length (< 16SI)
- Low speed PWM Gears from G1 to G4 with ultra-low power consumptions