LVDS IP for SMIC

Welcome to the ultimate LVDS IP for SMIC hub! Explore our vast directory of LVDS IP for SMIC
All offers in LVDS IP for SMIC
Filter
Filter

Login required.

Sign in

Login required.

Sign in

Compare 31 LVDS IP for SMIC from 11 vendors (1 - 10)
  • LVDS Transceiver
    • Meets or exceeds the TIA/EIA-644 LVDS standard.
    • Driver, Receiver, Bias, and Power cells included.
    • Greater than 400Mbs data rate.
    • 1.8V core voltage, 3.3V IO voltage.
    • Receive fault detection.
    Block Diagram -- LVDS Transceiver
  • LVDS Receiver PHY
    • Converts 5-pair LVDS data stream into parallel 35 bits of CMOS data
    • Compatible with the TIA/EIA-644 LVDS standards
    • Supports up to 1.05Gbps data rate for UXGA
    • On-chip DLL requires no external component
    Block Diagram -- LVDS Receiver PHY
  • LVDS transmitter PHY
    • Silicon Proven in 22,28,55,65,130n,180n from SMIC, Global Foundries and Samsung
    • Compatible with the National DS90CF386
    • Compatible with the TIA/EIA-644 standards
    • Converts 35 bits data to 5-pair LVDS data stream
    Block Diagram -- LVDS transmitter PHY
  • LVDS Transceiver
    • Meets or exceeds the TIA/EIA-644 LVDS standard.
    • Driver, Receiver, Bias, and Power cells included.
    • Greater than 400Mbs data rate.
    • 1.8V core voltage, 5V IO voltage.
    • Receive fault detection.
    • 0.3ns differential pulse skew.
    Block Diagram -- LVDS Transceiver
  • V-by-One Tx IP, Silicon Proven in SMIC 40LL
    • 16 channels total 128 bits of parallel data, each channel has a bit width of 8 bits
    • DC coupling mode
    • Multi-channel shared offset
    • Built-in transmitter terminal impedance, no need for off-chip components
    Block Diagram -- V-by-One Tx IP, Silicon Proven in SMIC 40LL
  • RF Transceiver SMIC 55nm
    • 3GPP R14 NB_IOT??
    • SMIC55nm??
    • 2V ~ 3.6V????
    • ???:??10mA,??68mA@14dBm output,200mA@22dBm output,????<1uA
    Block Diagram -- RF Transceiver SMIC 55nm
  • LVDS TX+ (Transmitter) in UMC 40LP
    • Compatible with TIA/EIA-644 LVDS Standard
    • 49 Mbps - 770 Mbps bandwidth/channel
    • Up to 3.08 Gbps data throughput
    Block Diagram -- LVDS TX+ (Transmitter) in UMC 40LP
  • LVDS Receiver
    • Wide frequency range:
    • Power-Down Mode
    • Supports VGA, SVGA, XGA, SXGA, SXGA+ and QXGA
    • Up to 10.5 Gbit/s bandwidth
    Block Diagram -- LVDS Receiver
  • LVDS Transmitter
    • Wide frequency range:
    • Power-Down Mode
    • Supports VGA, SVGA, XGA, SXGA, SXGA+ and QXGA
    • On-chip Input Jitter Filtering
    Block Diagram -- LVDS Transmitter
  • LVDS interfaces
    • Wide operating range
    • High data rates
    • Very flexible programmability
    • Excellent signal integrity
    • TIA/EIA644A LVDS and sub-LVDS compatibility
    • Receiver also compatible with LVPECL
    Block Diagram -- LVDS interfaces
×
Semiconductor IP