High-speed IP for SMIC

Compare 35 High-speed IP for SMIC from 12 vendors (1 - 10)

LVDS Transceiver
- Meets or exceeds the TIA/EIA-644 LVDS standard.
- Driver, Receiver, Bias, and Power cells included.
- Greater than 400Mbs data rate.
- 1.8V core voltage, 3.3V IO voltage.
- Receive fault detection.
LVDS Receiver PHY
- Converts 5-pair LVDS data stream into parallel 35 bits of CMOS data
- Compatible with the TIA/EIA-644 LVDS standards
- Supports up to 1.05Gbps data rate for UXGA
- On-chip DLL requires no external component
LVDS transmitter PHY
- Silicon Proven in 22,28,55,65,130n,180n from SMIC, Global Foundries and Samsung
- Compatible with the National DS90CF386
- Compatible with the TIA/EIA-644 standards
- Converts 35 bits data to 5-pair LVDS data stream
LVDS Transceiver
- Meets or exceeds the TIA/EIA-644 LVDS standard.
- Driver, Receiver, Bias, and Power cells included.
- Greater than 400Mbs data rate.
- 1.8V core voltage, 5V IO voltage.
- Receive fault detection.
- 0.3ns differential pulse skew.
V-by-One Tx IP, Silicon Proven in SMIC 40LL
- 16 channels total 128 bits of parallel data, each channel has a bit width of 8 bits
- DC coupling mode
- Multi-channel shared offset
- Built-in transmitter terminal impedance, no need for off-chip components
RF Transceiver SMIC 55nm
- 3GPP R14 NB_IOT??
- SMIC55nm??
- 2V ~ 3.6V????
- ???:??10mA,??68mA@14dBm output,200mA@22dBm output,????<1uA
LVDS TX+ (Transmitter) in UMC 40LP
- Compatible with TIA/EIA-644 LVDS Standard
- 49 Mbps - 770 Mbps bandwidth/channel
- Up to 3.08 Gbps data throughput
LVDS Receiver
- Wide frequency range:
- Power-Down Mode
- Supports VGA, SVGA, XGA, SXGA, SXGA+ and QXGA
- Up to 10.5 Gbit/s bandwidth
LVDS Transmitter
- Wide frequency range:
- Power-Down Mode
- Supports VGA, SVGA, XGA, SXGA, SXGA+ and QXGA
- On-chip Input Jitter Filtering
LVDS interfaces
- Wide operating range
- High data rates
- Very flexible programmability
- Excellent signal integrity
- TIA/EIA644A LVDS and sub-LVDS compatibility
- Receiver also compatible with LVPECL