Voltage Regulator IP for SMIC

Compare 49 Voltage Regulator IP for SMIC from 10 vendors (1 - 10)

Linear Regulator, Low Noise optimized for sensitive application such as RF or PLL blocks
- Low noise: high power Supply Rejection Ratio (PSRR): - 65 dB at F < 10 kHz
- Low intrinsic noise: 20 uVRMS at 10 Hz to 20 kHz
- Low Bill-of-Material: optimized in density for the best trade-off for the given output current and input voltage range
- Cost efficient solution compared to external Power Management.
Power-On-Reset SMIC
- Start-up Time: max 10us
- Configurable Threshold
- Programmable Delay
- Uses Hysteresis to avoid false resets in noisy environments
Linear LDO Low-Dropout Voltage Regulator SMIC
- Input Voltage Range: PDK VddIO
- Programmable Output Voltage Range
- Current Load: <1mA to 100mA
- PSRR
Core Voltage Regulator
- Input voltage range 3.0V – 3.3V.
- Output voltage 1.2V or 1.8V ±4%.
- Output short circuit protection.
Linear regulator, low-noise optimized for sensitive analog loads such as CODEC and Reference
- Starring a PSRR of -65 dB at 20 kHz and a low intrinsic noise, combined with a low quiescent current of 110 uA, the nLR-VAIPO helps optimize the power management network for audio handheld applications such as smartphone and tablet.
- Small footprint: only 0.12 mm2 (including bandgap reference and POK circuit)
- Minimization of the overall system power, through the support of 3 modes of operation: normal, shutdown and bypass
- Eases integration in SoC nLR-VAIPO is delivered with behavioral models. These new views enable to build an optimized Power Management Network (PMNet) by verifying mode transitions as well as noise propagation.
LDO
Scalable, On-Die Voltage Regulation
- Droop and DFS/DVFS response profile
- Programmable droop and DFS/DVFS response rate
Nano power DC-DC converter in SMIC 40EF with ultra-low quiescent current and high efficiency at light load
- Ultra-low quiescent current to ensure minimum current consumption in deep sleep / hibernation mode
- High efficiency at light load to extend battery lifetime
Ultra-low quiescent LDO voltage regulator in SMIC 40EF
- Ultra-low quiescent LDO to supply always-on loads (eg: SRAM in retention mode)
Low-leakage LDO in SMIC 40EF to supply logic and analog domains (up to 5.5V input supply)
- Low leakage current for best consumption in sleep mode
- High PSRR to supply analog loads
- Support input supply voltage up to 5.5V
- Programmable output voltage