Regulator IP for SMIC
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23
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Linear regulator, low-noise optimized for sensitive analog loads such as CODEC and Reference
- Starring a PSRR of -65 dB at 20 kHz and a low intrinsic noise, combined with a low quiescent current of 110 uA, the nLR-VAIPO helps optimize the power management network for audio handheld applications such as smartphone and tablet.
- Small footprint: only 0.12 mm2 (including bandgap reference and POK circuit)
- Minimization of the overall system power, through the support of 3 modes of operation: normal, shutdown and bypass
- Eases integration in SoC nLR-VAIPO is delivered with behavioral models. These new views enable to build an optimized Power Management Network (PMNet) by verifying mode transitions as well as noise propagation.
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Linear Regulator, Low Noise optimized for sensitive application such as RF or PLL blocks
- Low noise: high power Supply Rejection Ratio (PSRR): - 65 dB at F < 10 kHz
- Low intrinsic noise: 20 uVRMS at 10 Hz to 20 kHz
- Low Bill-of-Material: optimized in density for the best trade-off for the given output current and input voltage range
- Cost efficient solution compared to external Power Management.
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SMIC 0.18µm 5v-3.3v/1.8v Power Regulator
- Process: SMIC 0.18μm 3.3V/1.8V 1P5M/6M Logic process
- (This IP can work in both generic 0.18um process & 0.153um shrink process without any design change.)
- Input voltage: 2.7~5.5V
- Regulated output voltage: 3.3V±8% (in regulation region); 1.8V±8%
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SMIC 65nm LL 3.3V-2.5/1.2V Power Regulator
- Process: SMIC 65nm 1.2V/2.5V
- Input voltage: 2.25~3.6V
- Regulated output voltage: VOUT25=2.5V±10% & VOUT12=1.2V±10%
- Dropout voltage: VOUT25(DROP)= 150mV (when IOUT25=60mA, AVDD=2.25V)
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SMIC 0.13µm 5v-3.3v Power Regulator
- Process: SMIC 0.13μm 3.3V/1.2V 1P6/7/8M Logic Process
- Input voltage: 2.7~5.5V
- Regulated output voltage: 3.3V±10%
- Dropout voltage: typical 240mV (when IOUT=300mA and VIN=2.7V, not considering the bonding wire and lead resistance VIN and VOUT)
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Ultra-low quiescent LDO voltage regulator in SMIC 40EF
- Ultra-low quiescent LDO to supply always-on loads (eg: SRAM in retention mode)
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Combined Power-On-Reset and Brown-Out-Reset in SMIC 40EF
- Monitored input voltage programmable from 0.55V to 3.3V
- Dual POR and BOR functions
- Low power mode for best consumption in sleep mode
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Over-voltage Protection Module to handle direct connection of voltage regulators to a 5V battery using standard 2.5V OD 3.3V devices
- Allows direct connection of voltage regulators to a 5V battery using standard 2.5V OD 3.3V devices
- Low-quiescent for best consumption in sleep & deep sleep modes
- Capless
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Low-leakage LDO in SMIC 40EF to supply logic and analog domains (up to 5.5V input supply)
- Low leakage current for best consumption in sleep mode
- High PSRR to supply analog loads
- Support input supply voltage up to 5.5V
- Programmable output voltage
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Nano power DC-DC converter in SMIC 40EF with ultra-low quiescent current and high efficiency at light load
- Ultra-low quiescent current to ensure minimum current consumption in deep sleep / hibernation mode
- High efficiency at light load to extend battery lifetime