General Purpose PLL IP for GLOBALFOUNDRIES
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- 12nm
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Fractional-N PLLs for Performance Computing
- Low jitter, suitable for many clocking applications, including high speed digital, ADC, DAC, medium-speed PHY
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 4GHz
- Reference clock from 10MHz to 500MHz
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Low Voltage, Low Power Fractional-N PLLs
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
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General Purpose Fractional-N PLLs
- Low power, suitable for logic clocking applications
- Extremely small die area, using a ring oscillator
- Twelve bits fractional resolution
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High Performance Fractional-N RF Frequency Synthesizer PLLs for 5G, WiFi, etc
- Fractional-N digital PLL architecture, using an LC-tank oscillator
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Fractional-N PLL for Performance Computing in GlobalFoundries 12LPP/14LPP
- Low jitter, suitable for many clocking applications, including high speed digital, ADC, DAC, medium-speed PHY
- Extremely small die area (< 0.004 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 4GHz
- Reference clock from 10MHz to 500MHz
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Wide Range Programmable Integer PLL on GLOBALFOUNDRIES 12LP+
- Electrically Programmable PLL for multiple applications
- Wide Ranges of Input and Output Frequency for diverse clocking needs
- Implemented with Analog Bits’ proprietary architecture
- Fully integrated inside customer-specified IO ring
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Wide Range Programmable Integer PLL on GLOBALFOUNDRIES 12LP
- Electrically Programmable PLL for multiple applications
- Wide Ranges of Input and Output Frequency for diverse clocking needs
- Implemented with Analog Bits’ proprietary architecture
- Fully integrated inside customer-specified IO ring
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PCIe Gen4/5 Ref Clock SSCG PLL on GLOBALFOUNDRIES 12LP+
- High performance design emphasis for meeting low jitter requirements in PCIe Gen4 & Gen5 applications
- Implemented with Analog Bits’ proprietary LC architecture
- Low power consumption
- Spread Spectrum Clock Generation (SSCG) and tracking capability
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PCIe Gen3 Class SSCG PLL on GLOBALFOUNDRIES 12LP+
- High performance design emphasis for meeting low jitter requirements in PCI Express applications
- Implemented with Analog Bits’ proprietary architecture
- Low power consumption
- Spread Spectrum Clock Generation (SSCG) and tracking capability
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PCIe Gen3 Class SSCG PLL on GLOBALFOUNDRIES 12LP
- High performance design emphasis for meeting low jitter requirements in PCI Express applications
- Implemented with Analog Bits’ proprietary architecture
- Low power consumption
- Spread Spectrum Clock Generation (SSCG) and tracking capability