VeriSilicon SMIC 0.18μm 1.8V/3.3V ANALOGIO_05 IO Library
Overview
VeriSilicon SMIC 0.18um 1.8V/3.3V ANALOGIO_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.18μm Logic 1P6M Salicide 1.8/3.3V process. This library provides 5V analog IO pads. This library supports Inline I/O pad.
Key Features
- SMIC 0.18μm Logic 1P6M Salicide 1.8/3.3V process
- Provides 5V analog IO pads
- Supports Inline I/O pad
- Provides cells to interface with Generic IO library
- Suitable for four, five, or six metal layers of physical design
Technical Specifications
Foundry, Node
SMIC 0.18um
SMIC
Pre-Silicon:
180nm
EEPROM
,
180nm
G
,
180nm
LL
Related IPs
- VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_02 I/O Cell Library
- VeriSilicon SMIC 0.18μm 1.8V/3.3V CFIO_01 Library
- VeriSilicon UMC 0.18μm CF I/O
- VeriSilicon UMC 0.18μm CF I/O
- 28nm Wirebond IO library with dynamically switchable 1.8V/ 3.3V GPIO, 5V I2C open-drain, 1.8V & 3.3V analog, OTP program cell, and HDMI & LVDS protection macros - featured across a variety of metal stack and pad configuration options
- A 65nm Wirebond IO library with 1-3.3V GPIO, 3.3V pulse-width modulation cell, I2C & SVID open-drain, 3.3V & 5V analog and OTP program cell