Two port register file (1R1W) with low power retention mode
Overview
Low Leakage. Mobile Semiconductor's Bulk 22 ULL Register file memory compiler generates dual port Register File instances using the Bulk 22ULL process. Each ultra-low leakage memory instance primarily uses low leakage HVT (LLHVT) devices and source biasing to minimize standby current. Read and write assist circuits ensure reliable operations with a periphery power supply as low as 0.72V.
Key Features
- Ultra low power data retention. Memory instances generated by the Bulk 22ULL go into a deep sleep mode that retains data at minimal power consumption.
- Self biasing. The RF2P-Bulk 22ULL internal self-biasing capabilities provide ease of IP integration.
- High yield. To ensure high manufacturing yield, bulk 22ULL uses low leakage 6T (0.110µ2) bit cells and is consistent with Design for Manufacturing (DFM) guidelines for the Bulk 22ULL process.
- High usability. All signal and power pins are available on metal 4 while maintaining routing porosity in metal 4. Power pins can optionally be made available on metal 5 to simplify the power connections at the chip level.
Benefits
- Low Power, high yield
Applications
- IOT, Mobile
Deliverables
- Register File Compiler up to 72Kb
- EDA Views
- Verilog Test Bench
- Tessent BIST Synthesis Control
Technical Specifications
Foundry, Node
Bulk 22 ULL
Maturity
In Development Silicon Test Q1 2025
Availability
NOW
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