Vendor: softDSP Category: Channel Coding

Turbo decoder

softDSP released 3GPP compliant Turbo decoder IP core in May, 2000.

Overview

softDSP released 3GPP compliant Turbo decoder IP core in May, 2000. We also supply simulation program and C-source code, designer's guide, test vector, interleaver generation C source code. Powerful decoding performance and small-size implementation will meet your system requirements satisfactorily. softDSP Turbo decoder has the feature of easy I/O interface and used as a slave device controlled by host processor such as ARM core or any other DSP processor. It is recommended that every other part of 3GPP FDD blocks except Turbo decoder is implemented by s/w (dsp) for the such conditions as control oriented feature, easy updating, and development time reduction.

You may be working on system performance modeling, system implementation or you may require help with the implementation of a specific component. We work at all stages of the system design of channel coding and our expertise together with our hardware or software implementations will allow you to rapidly achieve your objectives.

Key features

  • Use max-log-MAP decoder as an internal component decoder which produces better performance than the other component decoder
  • Use sliding-window technology to reduce internal memory size
  • Constraint length K=4 (8-state with g0=1+D2+D3, g1=1+D+D3), rate 1/2, 1/3
  • 4-8 bit soft input (recommend over 5bit input) with internal 8bit fixed-point processing
  • Support 8-level Eb/N0 scaling
  • 3GPP compliant (block size 40-5114)
  • Easy to use interface, easy to modify or adapt

What’s Included?

  • VHDL source code
  • Test C-source code (floating point and fixed point)
  • Interleaver generation routine C-source (3G TS 25.212 V.3.2.0)
  • Test data vector

Specifications

Identity

Part Number
Turbo decoder
Vendor
softDSP
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

softDSP
HQ: Korea
softDSP is a company that specializes in FEC(forward error correcting) , DSP(digital signal processing) and Digital Instrumentation system.

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Frequently asked questions about Channel Coding IP cores

What is Turbo decoder?

Turbo decoder is a Channel Coding IP core from softDSP listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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