Specialty Analog ESD IO IP, UMC 28nm HLP process
Overview
UMC 28nm HLP Logic process, 3.3V Analog ESD IO Cell Library.
Technical Specifications
Short description
Specialty Analog ESD IO IP, UMC 28nm HLP process
Vendor
Vendor Name
Foundry, Node
UMC 28nm HLP
UMC
Pre-Silicon:
28nm
HLP
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