The SMPTE292 core set, coupled with the AMCC S8401/S8501 serializer/deserializer chipset is fully compliant to the SMPTE 292M specification for Bit Serial Interfaces for High Definition Television Systems. The core set includes separate Xilinx Virtex/Spartan-II cores for transmitter coding (scrambling and NRZI) and receiver decoding (NRZ, descrambling, sync detect and word framing).
The CORE set is supplied as two cores, one for transmit and one for receive. The block diagrams are shown in Figure 1 in a system context. The cores may be purchased separately or as a set.
