Programmable gain amplifier

Overview

250iHP_PGA_01 is a programmable gain amplifier (PGA) with low-pass filter (LPF). The block consists of 2 amplification stages with tunable (5-bit control) gain from 0 to 40dB. Both stages have single-ended input and output and produce max 20dB gain each. Gain can be set by the digital code GC<4:0>. Internal LPF is targeting 15 kHz cut-off frequency. Cut-off frequency adjustment can be held by changing of BW1<3:0> and BW2<3:0> inputs for 1st and 2nd amplifiers respectively. DC offset adjustment can be held by setting of OFFSET1<3:0> and OFFSET2<3:0> inputs. The IP features are low power consumption and compact area.

Key Features

  • iHP SG25H4 SiGe BiCMOS 0.25 um
  • 2.5 V supply voltage
  • Gain range 0…40 dB (5-bit control)
  • Low current consumption: 0.5mA
  • Compact die area: 0.373 mm2

Block Diagram

Programmable gain amplifier Block Diagram

Applications

  • AGC systems
  • Gain control systems
  • Receivers

Deliverables

  • Schematic or NetList
  • Abstract view (.lef and .lib files)
  • Layout (optional)
  • Verilog behavior model
  • Extracted view (optional)
  • GDSII
  • DRC, LVS, antenna report
  • Test bench with saved configurations (optional)
  • Documentation

Technical Specifications

Foundry, Node
iHP SiGe BiCMOS 0.25 um
Maturity
Silicon proven
Availability
Now
×
Semiconductor IP