PLL (Frequency Synthesizer) IP, Input: 5MHz - 300MHz, Output: 20MHz - 300MHz, UMC 65nm LL process
Overview
Input 5M-300MHz, output 20M-300MHz, frequency synthesizable PLL, UMC 65nm LL/RVT process.
Technical Specifications
Foundry, Node
UMC 65nm LL
UMC
Pre-Silicon:
65nm
LL
Related IPs
- PLL (Frequency Synthesizer) IP, Input: 5MHz - 100MHz, Output: 20MHz - 300MHz, UMC 90nm SP process
- PLL (Frequency Synthesizer) IP, Input: 5MHz - 300MHz, Output: 20MHz - 300MHz, UMC 90nm LL process
- PLL (Frequency Synthesizer) IP, Input: 5MHz - 100MHz, , Output: 20MHz - 300MHz, UMC 0.25um process
- PLL (Frequency Synthesizer) IP, Input: 5MHz - 300MHz, Output: 20MHz - 300MHz, UMC 0.18um G2 process
- PLL (Frequency Synthesizer) IP, Input: 5MHz - 300MHz, Output: 20MHz - 300MHz, UMC 0.18um G2 process
- PLL (Frequency Synthesizer) IP, Input: 5MHz - 300MHz, Output: 20MHz - 300MHz, UMC 90nm SP process