PLL (Frequency Synthesizer) IP, Input: 5MHz - 300MHz, Output: 20MHz - 300MHz, UMC 0.18um G2 process
Overview
Input 5M-300MHz, output 20M-300MHz, frequency synthesizable PLL with power/ground pad, UMC 0.18um GII Logic process.
Technical Specifications
Foundry, Node
UMC 180nm G2
UMC
Pre-Silicon:
180nm
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