PLL (Frequency Synthesizer) IP, Input: 5MHz - 100MHz, Output: 20MHz - 400MHz, UMC 0.13um LL/FSG process
Overview
Input 5M-100MHz, output 20M-400MHz, frequency synthesizable PLL with power/ground pad, UMC 0.13um Logic Fusion (FSG) process.
Technical Specifications
Foundry, Node
UMC 130nm LL/FSG
UMC
Pre-Silicon:
130nm
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