PLL (Frequency Synthesizer) IP, Input: 20MHz - 36MHz, Output: 500MHz - 1GHz, UMC 90nm SP process
Overview
Input 20M-36MHz, output 500M-1000MHz, frequency synthesizable PLL, UMC 90nm SP/RVT Logic Low-K process.
Technical Specifications
Short description
PLL (Frequency Synthesizer) IP, Input: 20MHz - 36MHz, Output: 500MHz - 1GHz, UMC 90nm SP process
Vendor
Vendor Name
Foundry, Node
UMC 90nm SP
UMC
Pre-Silicon:
90nm
SP
Related IPs
- PLL (Frequency Synthesizer) IP, Input: 20MHz - 200MHz, Output: 500MHz - 1GHz, UMC 40nm LP process
- PLL (Frequency Synthesizer) IP, Input: 20MHz - 200MHz, Output: 500MHz - 1GHz, UMC 0.11um HS/FSG process
- PLL (Frequency Synthesizer) IP, Input: 20MHz - 200MHz, Output: 500MHz - 1GHz, UMC 0.11um HS/AE process
- PLL (Frequency Synthesizer) IP, Input: 20MHz - 200MHz, Output: 500MHz - 1GHz, UMC 0.13um HS/FSG process
- PLL (Frequency Synthesizer) IP, Input: 20MHz - 200MHz, Output: 500MHz - 1GHz, UMC 0.13um HS/FSG process
- Single Port SRAM Compiler IP, UMC 65nm SP process