PLL (Frequency Synthesizer) IP, Input: 20MHz - 200MHz, Output: 500MHz - 1GHz, UMC 0.13um HS/FSG process
Overview
Input 20M-200MHz, output 500M-1000MHz, frequency synthesizable PLL, UMC 0.13um Logic HS process.
Technical Specifications
Foundry, Node
UMC 130nm HS/FSG
UMC
Pre-Silicon:
130nm
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