Ultra Low Power AI core

Overview

Akida Pico accelerates a set of highly optimized temporal event-based neural network models to create an ultra energy-efficient, and purely digital, event-based processing architecture. Akida Pico features built in capabilities to execute these networks without a host CPU, enabling stand-alone operation for always on ultra low power. BrainChip’s unique MetaTF software flow enables developers to compile and optimize their chosen models for the Akida Pico.

The Akida Pico can be paired to wake up an MCU or CPU via low-power SPI or I2S interfaces to create very compact, ultra-low-power, portable and intelligent devices for wearables, remote sensors, always on wake-up devices, Healthcare, Consumer, Smart Home and AIoT applications. The Akida Runtime software manages network processing to fully utilize available resources and can automatically partitions execution into multiple passes.

Key Features

Single Neural Processing Engine
Minimal core for Temporal Event-based neural networks (TENNs)
4-bit and 8-bit precision arithmetic support (add bullet)
DMA with integrated event converter for 8-bit data
Configuration DMA for model weights
AXI-4 bus matrix master
Clock Frequency
- 1-1000 MHz (process/voltage dependent)
- Static clock for clock gating

Benefits

Ultra-low power standalone NPU core (<1mW)
Support power islands for minimal standby power
Industry-standard development environment
Very Small logic die area
Optimize overall die size with configurable data buffer and model parameter memory

Block Diagram

Applications

Voice Wake Detect
Key Word Spotting
Speech Noise Reduction
Audio Enhancement

Deliverables

RTL
Synthesis Scripts
Timing Scripts
Xilinx FPGA

Technical Specifications

Maturity

New product configuration based on mature Akida 2 platform

Availability

Q4'24

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